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Subject[2.5. PATCH] cpufreq: correct initialization on PIII Coppermines
The detection process for speedstep-enabled Pentium IIIs mixed up the
lower and upper 32 bits of a MSR. Additionally, the second check
turned out to be wrong. (Bruno Ducrot, "Nash")

Dominik


--- linux-2545original/arch/i386/kernel/cpu/cpufreq/speedstep.c Thu Oct 31 12:00:00 2002
+++ linux/arch/i386/kernel/cpu/cpufreq/speedstep.c Thu Oct 31 20:30:00 2002
@@ -1,5 +1,5 @@
/*
- * $Id: speedstep.c,v 1.53 2002/09/29 23:43:11 db Exp $
+ * $Id: speedstep.c,v 1.54 2002/10/10 15:52:55 db Exp $
*
* (C) 2001 Dave Jones, Arjan van de ven.
* (C) 2002 Dominik Brodowski <linux@brodo.de>
@@ -72,7 +72,7 @@
#ifdef SPEEDSTEP_DEBUG
#define dprintk(msg...) printk(msg)
#else
-#define dprintk(msg...) do { } while(0);
+#define dprintk(msg...) do { } while(0)
#endif


@@ -490,16 +490,10 @@
/* platform ID seems to be 0x00140000 */
rdmsr(MSR_IA32_PLATFORM_ID, msr_lo, msr_hi);
dprintk(KERN_DEBUG "cpufreq: Coppermine: MSR_IA32_PLATFORM ID is 0x%x, 0x%x\n", msr_lo, msr_hi);
- msr_hi = msr_lo & 0x001c0000;
+ msr_hi &= 0x001c0000;
if (msr_hi != 0x00140000)
return 0;

- /* and these bits seem to be either 00_b, 01_b or
- * 10_b but never 11_b */
- msr_lo &= 0x00030000;
- if (msr_lo == 0x0030000)
- return 0;
-
/* let's hope this is correct... */
return SPEEDSTEP_PROCESSOR_PIII_C;
}
@@ -644,11 +638,11 @@
speedstep_processor = speedstep_detect_processor();

if ((!speedstep_chipset) || (!speedstep_processor)) {
- dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) for this %s not (yet) available.\n", speedstep_processor ? "chipset" : "processor");
+ printk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) for this %s not (yet) available.\n", speedstep_processor ? "chipset" : "processor");
return -ENODEV;
}

- dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) support $Revision: 1.53 $\n");
+ dprintk(KERN_INFO "cpufreq: Intel(R) SpeedStep(TM) support $Revision: 1.54 $\n");
dprintk(KERN_DEBUG "cpufreq: chipset 0x%x - processor 0x%x\n",
speedstep_chipset, speedstep_processor);
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