Messages in this thread | | | Date | Mon, 20 Sep 1999 20:57:10 +0000 | From | Manfred Spraul <> | Subject | SMP patch |
| |
Ingo, I noticed that you perform the RDTSC synchonization only if the kernel was compiled with "CONFIG_X86_TSC". I think this is a bad idea: RDTSC is available to user space, an unsynchronized RDTSC might confuse user mode programs. Couldn't you convert the code from the #define to ".x86_capability & TSC"?
I've tested your patch on a Gigabyte BXD, Dual PII/350 Deschutes [intel 440BX] APIC Version 17 IO-APIC Version 17
Everything seems fine. I noticed that if the computer is idle, then there is a strong bias of the timer interrupts to CPU1 (19,343 interupts on CPU0, 84415 interrupts on CPU1). [this bias is also present with 2.2.12]
The bias goes away under load [ie constant flood ping]. -- Manfred
- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.rutgers.edu Please read the FAQ at http://www.tux.org/lkml/
| |