Messages in this thread | | | Date | Sat, 23 May 1998 15:35:19 -0500 (EST) | From | "Rafael R. Reilova" <> | Subject | Cyrix 6x686MX TSC again (Was: Re: Cyrix 6x86MX TSC testing program) |
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Hi again,
Andre Derrick Balsa wrote: > > Rafael R. Reilova wrote: > > > > or there is no way to get a > > division by zero on the kernel (Maybe this is why I don't get the kernel > > ops, yet my 686MX rev.3 TSC does stop when SOH is enabled.) > > Humm, just a small question: I have noticed that the oops were triggered > by having a network daemon (usually innd) calling the kernel for > timestamping of TCP packets. Do you have your Linux machine connected to > a network, or is it stand-alone? > >
Hmmm, now things begin to make sense. I _did_ notice strage behavior when connected to the internet through ppp. Most of the time my box is standalone, but when connected I can make the connection slow down to a crawl (even timeout and get disconnected) by enabling the SOH (at least on 2.1.101, AYK the default now is not to use the do_fast_timeoffset on Cyrixes). Disabling the SOH would suddenly bring all connections back to life. Guess all those timers in the IP layer get very confused. Perhaps if I didn't get disconnected, the kernel would eventually Oops. OTOH, if nobody is using timestamping then no Oops (duh!).
This Cyrix thing has been dragging on for a while now. Someone metioned that it may be possible to do something on the line of,
if (APM || TSC_QUIRK) Save current TSC
do halt (or call the APM routine if APM compiled in)
if (APM || TSC_QUIRK) { Calculate TSC error from the RTC or sys. timer Fix the TSC }
In fact, think I remember a patch flying around (if so, could the author please email me a copy). Now the question is, are those top bits of the TSC writtable? Again the Cyrix docs say that executing a WRMSR $10 with DX:AX will do, (the instruction is priviledged so kernel hacking required to test).
This might fix the APM problem too, but is kind of a bad hack, and might not work on all processors (Pentiums I believe will not write to the top 32-bits of the TSC). Also, it introduces a slight latency when comming out of a halt which people without the TSC problem or APM will not want in their kernels (CONFIG_TSC_QUIRKS anyone).
Cheers,
-- Rafael
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