Messages in this thread | | | From | (Alan Cox) | Subject | Re: 2.1.125 - Problem. & Aic7xxx 5.1.0 | Date | Sat, 21 Nov 1998 20:54:21 +0000 (GMT) |
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> The mb() macro does a memory locked operation to force ordering. If that > doesn't do the PCI flush, then that was a mis-understanding on my part
It will force ordering on x86 - x86 pci ordering should be guaranteed anyway in theory (unless people play with mtrr settings).
The m68k/ppc folks are now starting to add io synchronization stuff portably (no files full of eieio() even if its funny) with
iobarrier_r() iobarrier_w() iobarrier_rw()
which are nops on a normal PC.
Alan
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