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SubjectRe: Cyrix cpuid'n stuff...
On Wed, 16 Oct 1996, Johnny Stenback wrote:

> Yeah, but there's a way around that, there is (as posted in some
> patches here a couple of times already) a way to determine if the cpu
> is intel or cyrix before touching those ports are touched, it's done
> by setting eflags to 0, then doing div xxx,xxx and then checking if
> other than the 2:nd bit in eflags is 1, if it is then it's a some kind
> of non-intel cpu (this isn't necessarily the exact way to do it but at
> least it's in that direction). After this check those ports can be
> safely (?) touched, I don't say that the cyrix way of configures these
> registers isn't dumb but it should be doable without the possibility
> to break other cpu:s...

Yeah, the Cyrix changes flags in ways that other chips don't which
makes a rough and ready test. It isn't that easy to add features,
especially when you are the smaller player, casting in silicon,
entering a volume market where you need compatibility with all kinds
of existing crap code and can't a mistake. "Should" is not a good
basis for fundamental design decisions :-).

> > P.S. Someone was having problem with the magic number weren't they?
> > You set the MAPEN to 1. You don't set each bit in MAPEN to 1...
>
> Yeah, it was me, I found out, guess if I feel STUPID. Hopefylly I will
> learn (to read) from my mistakes...

Don't worry. I did exactly the same thing. It seemed _obvious_ that
since MAPEN was a set of bits in a byte that they were talking about
setting bits... Nope... :-(

Mike

P.S. I have the patches for Cyrix recognition and use of the variable
size paging mechanism (VSPM) working happily. When I roll them into
a reasonably recent kernel I'll let Linus have them. (Oh, I didn't
bother differentiating between IBM and Cyrix badged parts. It doesn't
seem worth the trouble to me?)

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| Mike Jagdis | Internet: mailto:mike@roan.co.uk |
| Roan Technology Ltd. | |
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