Messages in this thread | | | Date | Fri, 10 May 2024 21:43:23 +0200 | Subject | Re: [PATCH v2 4/4] arm64: dts: broadcom: Add support for BCM2712 | From | Stefan Wahren <> |
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Hi Andrea,
Am 10.05.24 um 16:35 schrieb Andrea della Porta: > The BCM2712 SoC family can be found on Raspberry Pi 5. > Add minimal SoC and board (Rpi5 specific) dts file to be able to > boot from SD card and use console on debug UART. > > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > --- > arch/arm64/boot/dts/broadcom/Makefile | 1 + > .../boot/dts/broadcom/bcm2712-rpi-5-b.dts | 62 ++++ > arch/arm64/boot/dts/broadcom/bcm2712.dtsi | 302 ++++++++++++++++++ > 3 files changed, 365 insertions(+) > create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts > create mode 100644 arch/arm64/boot/dts/broadcom/bcm2712.dtsi > > diff --git a/arch/arm64/boot/dts/broadcom/Makefile b/arch/arm64/boot/dts/broadcom/Makefile > index 8b4591ddd27c..92565e9781ad 100644 > --- a/arch/arm64/boot/dts/broadcom/Makefile > +++ b/arch/arm64/boot/dts/broadcom/Makefile > @@ -6,6 +6,7 @@ DTC_FLAGS := -@ > dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \ > bcm2711-rpi-4-b.dtb \ > bcm2711-rpi-cm4-io.dtb \ > + bcm2712-rpi-5-b.dtb \ > bcm2837-rpi-3-a-plus.dtb \ > bcm2837-rpi-3-b.dtb \ > bcm2837-rpi-3-b-plus.dtb \ > diff --git a/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts > new file mode 100644 > index 000000000000..b5921437e09f > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/bcm2712-rpi-5-b.dts > @@ -0,0 +1,62 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/dts-v1/; > + > +#include <dt-bindings/gpio/gpio.h> > +#include "bcm2712.dtsi" > + > +/ { > + compatible = "raspberrypi,5-model-b", "brcm,bcm2712"; > + model = "Raspberry Pi 5"; > + > + aliases { > + serial10 = &uart0; > + }; > + > + chosen: chosen { > + stdout-path = "serial10:115200n8"; > + }; > + > + /* Will be filled by the bootloader */ > + memory@0 { > + device_type = "memory"; > + reg = <0 0 0x28000000>; > + }; > + > + sd_io_1v8_reg: sd-io-1v8-reg { > + compatible = "regulator-gpio"; > + regulator-name = "vdd-sd-io"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + regulator-always-on; > + regulator-settling-time-us = <5000>; > + gpios = <&gio_aon 3 GPIO_ACTIVE_HIGH>; > + states = <1800000 0x1>, > + <3300000 0x0>; > + }; > + > + sd_vcc_reg: sd-vcc-reg { > + compatible = "regulator-fixed"; > + regulator-name = "vcc-sd"; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + regulator-boot-on; > + enable-active-high; > + gpios = <&gio_aon 4 GPIO_ACTIVE_HIGH>; > + }; > +}; > + > +/* The system UART */ Not sure this comment is helpful. Debug UART? > +&uart0 { > + status = "okay"; > +}; > + > +/* SDIO1 is used to drive the SD card */ > +&sdio1 { > + vqmmc-supply = <&sd_io_1v8_reg>; > + vmmc-supply = <&sd_vcc_reg>; > + bus-width = <4>; > + sd-uhs-sdr50; > + sd-uhs-ddr50; > + sd-uhs-sdr104; > +}; > diff --git a/arch/arm64/boot/dts/broadcom/bcm2712.dtsi b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi > new file mode 100644 > index 000000000000..398df13148bd > --- /dev/null > +++ b/arch/arm64/boot/dts/broadcom/bcm2712.dtsi > @@ -0,0 +1,302 @@ > +// SPDX-License-Identifier: GPL-2.0 > +#include <dt-bindings/interrupt-controller/arm-gic.h> > + > +/ { > + compatible = "brcm,bcm2712"; > + > + #address-cells = <2>; > + #size-cells = <1>; > + > + interrupt-parent = <&gicv2>; > + > + axi: axi { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <1>; > + ranges; > + > + sdio1: mmc@1000fff000 { > + compatible = "brcm,bcm2712-sdhci", > + "brcm,sdhci-brcmstb"; > + reg = <0x10 0x00fff000 0x260>, > + <0x10 0x00fff400 0x200>; > + reg-names = "host", "cfg"; > + interrupts = <GIC_SPI 273 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clk_emmc2>; > + clock-names = "sw_sdio"; > + mmc-ddr-3_3v; > + }; > + > + gicv2: interrupt-controller@107fff9000 { > + interrupt-controller; > + #interrupt-cells = <3>; > + compatible = "arm,gic-400"; > + reg = <0x10 0x7fff9000 0x1000>, > + <0x10 0x7fffa000 0x2000>, > + <0x10 0x7fffc000 0x2000>, > + <0x10 0x7fffe000 0x2000>; > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | > + IRQ_TYPE_LEVEL_HIGH)>; Please take care of the DTS coding style [1]. > + }; > + }; > + > + clocks { > + /* The oscillator is the root of the clock tree. */ > + clk_osc: clk-osc { > + compatible = "fixed-clock"; > + #clock-cells = <0>; > + clock-output-names = "osc"; > + clock-frequency = <54000000>; > + }; > + > + clk_vpu: clk-vpu { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <750000000>; > + clock-output-names = "vpu-clock"; > + }; > + > + clk_uart: clk-uart { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <9216000>; > + clock-output-names = "uart-clock"; > + }; > + > + clk_emmc2: clk-emmc2 { > + #clock-cells = <0>; > + compatible = "fixed-clock"; > + clock-frequency = <200000000>; > + clock-output-names = "emmc2-clock"; > + }; > + }; > + > + cpus: cpus { > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* Source for d/i cache-line-size, cache-sets, cache-size > + * https://developer.arm.com/documentation/100798/0401 > + * /L1-memory-system/About-the-L1-memory-system?lang=en I think we should try to keep URLs in one line, even checkpatch complains about it.
[1] - https://docs.kernel.org/devicetree/bindings/dts-coding-style.html
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