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Subject[PATCH v2 2/4] dt-bindings: mmc: Add support for BCM2712 SD host controller
Date
The BCM2712 has an SDHCI capable host interface similar to the one found
in other STB chipsets. Add the relevant compatible string and relative
example.

Signed-off-by: Andrea della Porta <andrea.porta@suse.com>
---
.../bindings/mmc/brcm,sdhci-brcmstb.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
index cbd3d6c6c77f..404b75fa7adb 100644
--- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
+++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
@@ -13,6 +13,10 @@ maintainers:
properties:
compatible:
oneOf:
+ - items:
+ - enum:
+ - brcm,bcm2712-sdhci
+ - const: brcm,sdhci-brcmstb
- items:
- enum:
- brcm,bcm7216-sdhci
@@ -114,3 +118,22 @@ examples:
clocks = <&scmi_clk 245>;
clock-names = "sw_sdio";
};
+
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ soc {
+ #address-cells = <2>;
+ #size-cells = <2>;
+
+ mmc@1000fff000 {
+ compatible = "brcm,bcm2712-sdhci",
+ "brcm,sdhci-brcmstb";
+ reg = <0x10 0x00fff000 0x0 0x260>,
+ <0x10 0x00fff400 0x0 0x200>;
+ reg-names = "host", "cfg";
+ mmc-ddr-3_3v;
+ interrupts = <GIC_SPI 0x111 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clk_emmc2>;
+ clock-names = "sw_sdio";
+ };
+ };
--
2.35.3

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