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    Subject[PATCH v2 11/17] clk: imx: imx8mn: add sai7_ipg_clk clock settings
    From: Adrian Alonso <adrian.alonso@nxp.com>

    Add IMX8MN_CLK_SAI7_IPG clock entry.

    Reviewed-by: Peng Fan <peng.fan@nxp.com>
    Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
    Signed-off-by: Peng Fan <peng.fan@nxp.com>
    ---
    drivers/clk/imx/clk-imx8mn.c | 1 +
    1 file changed, 1 insertion(+)

    diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c
    index 4bd1ed11353b..ab77e148e70c 100644
    --- a/drivers/clk/imx/clk-imx8mn.c
    +++ b/drivers/clk/imx/clk-imx8mn.c
    @@ -583,6 +583,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
    hws[IMX8MN_CLK_SDMA2_ROOT] = imx_clk_hw_gate4("sdma2_clk", "ipg_audio_root", base + 0x43b0, 0);
    hws[IMX8MN_CLK_SDMA3_ROOT] = imx_clk_hw_gate4("sdma3_clk", "ipg_audio_root", base + 0x45f0, 0);
    hws[IMX8MN_CLK_SAI7_ROOT] = imx_clk_hw_gate2_shared2("sai7_root_clk", "sai7", base + 0x4650, 0, &share_count_sai7);
    + hws[IMX8MN_CLK_SAI7_IPG] = imx_clk_hw_gate2_shared2("sai7_ipg_clk", "ipg_audio_root", base + 0x4650, 0, &share_count_sai7);

    hws[IMX8MN_CLK_GPT_3M] = imx_clk_hw_fixed_factor("gpt_3m", "osc_24m", 1, 8);

    --
    2.37.1


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