Messages in this thread |  | | Date | Wed, 2 Sep 2026 10:34:25 +0200 | | From | Andreas Kemnade <> | | Subject | Re: [PATCH v2 0/2] clk: ti: mux: resolve parent clocks by DT index, not by name |
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On Wed, 2 Sep 2026 08:26:39 +0200 Andreas Kemnade <andreas@kemnade.info> wrote:
> Hi, > > this seems to produce on OMAP3 (DM3730), even with the init fix. > > [ 0.000000] clocksource: 32k_counter: mask: 0xffffffff max_cycles: 0xffffffff > , max_idle_ns: 58327039986419 ns > [ 0.000030] sched_clock: 32 bits at 33kHz, resolution 30517ns, wraps every 65 > 535999984741ns > [ 0.013488] clk: failed to reparent gpt1_fck to omap_32k_fck: -22 > [ 0.019805] Failed to initialize '/ocp@68000000/target-module@48318000/timer@ > 0': -19 >
created a backrace with that -EINVAL: [ 0.030975] clk_fetch_parent_index from clk_core_set_parent_nolock+0x7c/0x18 [ 0.031005] clk_core_set_parent_nolock from clk_set_parent+0x6c/0x18c [ 0.031036] clk_set_parent from of_clk_set_defaults+0x304/0x6e8 [ 0.031066] of_clk_set_defaults from dmtimer_systimer_setup+0x5c/0x1cc [ 0.031127] dmtimer_systimer_setup from dmtimer_clkevt_init_common+0x78/0x10 [ 0.031158] dmtimer_clkevt_init_common from dmtimer_clockevent_init+0x80/0x8 [ 0.031188] dmtimer_clockevent_init from dmtimer_systimer_init+0x114/0x134 [ 0.031219] dmtimer_systimer_init from timer_probe+0x68/0xf4 [ 0.031250] timer_probe from start_kernel+0x19c/0x370 [ 0.031280] start_kernel from 0x0
Maybe something is not ready yet for using indexes instead of names there.
> Regards, > Andreas > > On Mon, 27 Jul 2026 09:41:39 +0200 > Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com> wrote: > > > This commit aims to solve an issue I've been describing a few months ago > > on AM335x SoC [1]. I believe using the parent_data field of > > clk_init_data structure is now the preferred way to convey that data, > > and it should be more reliable than string comparisons. > > > > [1]: https://lore.kernel.org/all/DI4RUFQNSSNP.2QMSSQWJW9I2O@bootlin.com/ > > > > Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com> > > --- > > Changes in v2: > > - Also use clk_parent_data structure in composite.c. > > - Rebase on v7.2-rc5. > > - Link to v1: https://lore.kernel.org/r/20260715-mathieu-wdt-clock-theo-v1-1-da65bba1828b@bootlin.com > > > > --- > > Mathieu Dubois-Briand (2): > > clk: ti: mux: resolve parent clocks by DT index, not by name > > clk: ti: composite: resolve parent clocks by DT index, not by name > > > > drivers/clk/ti/composite.c | 26 ++++++++++++++------------ > > drivers/clk/ti/mux.c | 20 +++++++++++--------- > > 2 files changed, 25 insertions(+), 21 deletions(-) > > --- > > base-commit: f5098b6bae761e346ebcd9da7f95622c04733cff > > change-id: 20260713-mathieu-wdt-clock-theo-f0c5ba58e258 > > > > Best regards, > > >
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