Messages in this thread |  | | From | Geert Uytterhoeven <> | | Date | Thu, 7 May 2026 14:43:40 +0200 | | Subject | Re: [PATCH 1/3] clk: renesas: r9a08g046: Add clock and reset entries for the RSCI |
| |
Hi Biju,
On Tue, 5 May 2026 at 09:15, Biju <biju.das.au@gmail.com> wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > Add clock and reset entries for the Serial Communications Interface (RSCI) > found on the RZ/G3L SoC. This includes various dividers and mux clocks > needed for the four RSCI channels. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Thanks for your patch!
> --- a/drivers/clk/renesas/r9a08g046-cpg.c > +++ b/drivers/clk/renesas/r9a08g046-cpg.c > @@ -137,6 +167,7 @@ static const char * const sel_eth0_rm[] = { ".pll6_div10", "eth0_rxc_rx_clk" }; > static const char * const sel_eth1_tx[] = { ".div_eth1_tr", "eth1_txc_tx_clk" }; > static const char * const sel_eth1_rx[] = { ".div_eth1_tr", "eth1_rxc_rx_clk" }; > static const char * const sel_eth1_rm[] = { ".pll6_div10", "eth1_rxc_rx_clk" }; > +static const char * const sel_rsci[] = { ".pll2_div5", ".pll2_div6", ".pll2_div7", ".pll2_div2_4" };
OK if I rename sel_rsci to sel_rsci_rspi while applying, so it can be reused?
> static const char * const sel_eth0_clk_tx_i[] = { ".sel_eth0_tx", ".div_eth0_rm" }; > static const char * const sel_eth0_clk_rx_i[] = { ".sel_eth0_rx", ".div_eth0_rm" }; > static const char * const sel_eth1_clk_tx_i[] = { ".sel_eth1_tx", ".div_eth1_rm" };
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> i.e. will queue in renesas-clk for v7.2.
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
|  |