Messages in this thread Patch in this message |  | | From | Bartosz Golaszewski <> | | Date | Tue, 05 May 2026 11:04:44 +0200 | | Subject | [PATCH v2 4/6] MIPS: alchemy: db1000: use nodes attached to GPIO chips in properties |
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From: Dmitry Torokhov <dmitry.torokhov@gmail.com>
GPIO subsystem is switching the way it locates GPIO chip instances for GPIO references in software nodes by doing identity matching instead of matching on node names. Switch to using software nodes attached to gpio chips instead of using freestanding software nodes.
Also stop supplying platform data for the spi-gpio controller since spi-gpio driver can derive number of chipselect lines from device properties.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> --- arch/mips/alchemy/devboards/db1000.c | 36 +++++++++++------------------------- 1 file changed, 11 insertions(+), 25 deletions(-)
diff --git a/arch/mips/alchemy/devboards/db1000.c b/arch/mips/alchemy/devboards/db1000.c index 65238f14f28d61ef3eddfd571c7d61f01e7434fd..a23dba3d62b7862db1baa69c3f9034a10848706b 100644 --- a/arch/mips/alchemy/devboards/db1000.c +++ b/arch/mips/alchemy/devboards/db1000.c @@ -19,7 +19,6 @@ #include <linux/property.h> #include <linux/pm.h> #include <linux/spi/spi.h> -#include <linux/spi/spi_gpio.h> #include <asm/mach-au1x00/au1000.h> #include <asm/mach-au1x00/gpio-au1000.h> #include <asm/mach-au1x00/au1000_dma.h> @@ -377,20 +376,14 @@ static struct platform_device db1100_mmc1_dev = { /******************************************************************************/ -static const struct software_node db1100_alchemy2_gpiochip = { - .name = "alchemy-gpio2", -}; - -static const struct property_entry db1100_ads7846_properties[] = { - PROPERTY_ENTRY_U16("ti,vref_min", 3300), - PROPERTY_ENTRY_GPIO("pendown-gpios", - &db1100_alchemy2_gpiochip, 21, GPIO_ACTIVE_LOW), - { } -}; - static const struct software_node db1100_ads7846_swnode = { .name = "ads7846", - .properties = db1100_ads7846_properties, + .properties = (const struct property_entry[]){ + PROPERTY_ENTRY_U16("ti,vref_min", 3300), + PROPERTY_ENTRY_GPIO("pendown-gpios", + &alchemy_gpio2_node, 21, GPIO_ACTIVE_LOW), + { } + }, }; static struct spi_board_info db1100_spi_info[] __initdata = { @@ -405,32 +398,26 @@ static struct spi_board_info db1100_spi_info[] __initdata = { }, }; -static const struct spi_gpio_platform_data db1100_spictl_pd __initconst = { - .num_chipselect = 1, -}; - /* * Alchemy GPIO 2 has its base at 200 so the GPIO lines * 207 thru 210 are GPIOs at offset 7 thru 10 at this chip. */ static const struct property_entry db1100_spi_dev_properties[] __initconst = { PROPERTY_ENTRY_GPIO("miso-gpios", - &db1100_alchemy2_gpiochip, 7, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 7, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("mosi-gpios", - &db1100_alchemy2_gpiochip, 8, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 8, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("sck-gpios", - &db1100_alchemy2_gpiochip, 9, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 9, GPIO_ACTIVE_HIGH), PROPERTY_ENTRY_GPIO("cs-gpios", - &db1100_alchemy2_gpiochip, 10, GPIO_ACTIVE_HIGH), + &alchemy_gpio2_node, 10, GPIO_ACTIVE_HIGH), { } }; static const struct platform_device_info db1100_spi_dev_info __initconst = { .name = "spi_gpio", .id = 0, - .data = &db1100_spictl_pd, - .size_data = sizeof(db1100_spictl_pd), - .dma_mask = DMA_BIT_MASK(32), + .dma_mask = DMA_BIT_MASK(32), .properties = db1100_spi_dev_properties, }; @@ -483,7 +470,6 @@ int __init db1000_dev_setup(void) pfc |= (1 << 0); /* SSI0 pins as GPIOs */ alchemy_wrsys(pfc, AU1000_SYS_PINFUNC); - software_node_register(&db1100_alchemy2_gpiochip); spi_register_board_info(db1100_spi_info, ARRAY_SIZE(db1100_spi_info)); -- 2.47.3
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