Messages in this thread |  | | From | Geert Uytterhoeven <> | | Date | Tue, 5 May 2026 09:31:47 +0200 | | Subject | Re: [PATCH] dt-bindings: watchdog: renesas,wdt: Document RZ/G3L support |
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Hi Biju,
On Fri, 6 Feb 2026 at 12:22, Biju <biju.das.au@gmail.com> wrote: > From: Biju Das <biju.das.jz@bp.renesas.com> > > Document the support for the watchdog IP available on RZ/G3L SoC. The > watchdog IP available on RZ/G3L SoC is identical to the one found on > RZ/G2L SoC. > > Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/watchdog/renesas,rzg2l-wdt.yaml > +++ b/Documentation/devicetree/bindings/watchdog/renesas,rzg2l-wdt.yaml > @@ -18,6 +18,7 @@ properties: > - renesas,r9a07g044-wdt # RZ/G2{L,LC} > - renesas,r9a07g054-wdt # RZ/V2L > - renesas,r9a08g045-wdt # RZ/G3S > + - renesas,r9a08g046-wdt # RZ/G3L > - const: renesas,rzg2l-wdt > > - items:
However, there seems to be a small difference in the formulas for the timeout register value on the various SoCs:
RZ/G2L, RZ/G2UL, and RZ/V2L:
WDTTIME setting value = \frac{WDT cycle}{(WDTn_CLK (n = 0,1,2) cycle × 1024 × 1024) − 1}
RZ/G3S and RZ/G3E:
WDTTIME setting value = \frac{WDT cycle}{(WDTn_CLK (n = 0,1,2) cycle × 1024 × 1024} − 1
I.e. on the former, the "- 1" offset is inside the denominator, while on the former, it is outside the fraction. I assume this is just a typo in the documentation, and both formulas are supposed to be identical, so Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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