Messages in this thread Patch in this message |  | | From | Ender Hsieh <> | | Subject | [PATCH 1/1] ARM: dts: aspeed: msx4: enable BMC networking via MAC0 | | Date | Tue, 5 May 2026 14:05:41 +0900 |
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Add &mac0, &mdio3, and the ethphy3 PHY node to enable BMC networking on the AST2600-based NVIDIA MSX4 board. The PHY is attached to MDIO3 at address 2 and uses RGMII with PHY-internal delays.
These nodes were intentionally omitted in commit f28674fab34f ("ARM: dts: aspeed: Add NVIDIA MSX4 HPM") at Andrew Lunn's request, pending clarification of the RGMII delay handling. Following his guidance on linux-aspeed, the bootloader has been modified to stop enabling MAC clock delays on the SoC side, so phy-mode = "rgmii-id" correctly results in the PHY adding the required ~2ns delay without any double-delay from the MAC controller.
The corresponding U-Boot change has been submitted to openbmc/u-boot.
Link: https://patch.msgid.link/eac09481-0ba1-4ac2-ad8c-d859822ff0d5@lunn.ch Link: https://patch.msgid.link/20260504044702.2613879-1-andhsieh@nvidia.com Cc: Andrew Lunn <andrew@lunn.ch> Cc: Marc Olberding <molberding@nvidia.com> Signed-off-by: Ender Hsieh <andhsieh@nvidia.com> --- .../dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts | 15 +++++++++++++++ 1 file changed, 15 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts index a12d4164de4a..29f56176e2ca 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts @@ -208,6 +208,21 @@ &lpc_reset { status = "okay"; }; +&mac0 { + phy-mode = "rgmii-id"; + phy-handle = <ðphy3>; + status = "okay"; +}; + +&mdio3 { + status = "okay"; + + ethphy3: ethernet-phy@2 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <2>; + }; +}; + &rtc { status = "okay"; }; -- 2.34.1
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