> > > >>> +description:
> > > >>> +  The NXP I/O connector represents a physically present I/O
> > > >>> +connector on the
> > > >>> +  base board. It acts as a nexus that exposes a constrained set
> of
> > > >>> +I/O
> > > >>> +  resources, such as GPIOs, clocks, PWMs and interrupts, through
> > > >>> +fixed
> > > >>> +  electrical wiring. All actual hardware providers reside on the
> base
> > > board.
> > > >>> +  The connector node only defines index-based mappings to those
> > > >> providers.
> > > >>> +
> > > >>> +properties:
> > > >>> +  compatible:
> > > >>> +    const: fsl,io-connector
> > > >>
> > > >> Everything is IO. Everything is connector, so your compatible does
> > > >> not match requirements from writing bindings.
> > > >>
> > > >
> > > > Yes, this compatible is too generic. I will rename the compatible to
> > > > fsl,aud-io-connector.
> > >
> > > aud is not much better. Which boards have it? What's the pinout?
> What's
> > > standard? Is it described anywhere? If so, provide reference to
> spec/docs.
> > >
> >
> > This is not an industry standard electrical interface. This connector
> 
> Then if you do not have standard, then you have board specific layouts
> thus you need board-specific compatibles. You can use fallbacks. Generic
> fallback could work, but both io-connector and aud-io-connector are just
> too generic. Every connector is "connector" and "io", thus absolutely
> anything can be "io-connector". "aud" improves it only a bit, thus
> honestly I would go with board specific fallback as well.
> 

How about board specific + common fallback compatible like this:
  compatible:
    items:
      - enum:
          - fsl,imx95-19x19-evk-aud-io-connector
          - fsl,imx952-evk-aud-io-connector
      - const: fsl,imx-aud-io-connector
Since the daughter board is named “IMX-AUD-IO” in publicly available
documentation, common compatible clearly indicates that this connector
is intended for that.

Also, I want to talk about the topic of generic connector. It's a common
design that daughter board is connected to base board through a
connector. This connector more often acts as a nexus that exposes a
constrained subset of GPIO, clock, PWM and interrupt resources to the
daughter board. Can we document this kind of connector as a generic
binding?

Regards, 
Chancel Liu

> > is present on i.MX95-19x19-EVK and i.MX952-EVK. For example, the
> > "i.MX 95 19mm x 19mm Evaluation Kit" homepage[1] publicly documents an
> > audio board connection through which IMX-AUD-IO card is connected. The
> > detailed user manual (UM12022) is listed as official documentation[2],
> > but it is behind an NXP login, so it is not suitable as a public
> > reference for upstream. Therefore I list it here to illustrate it's
> > mechanism:
> >
> > +-----------------------------+
> > |        Base Board           |
> > |   +-----+      +---------+  |           +---------+
> > |   | SPI +------+         |  |           |         |
> > |   +-----+      |         |  | GPIO MAP  |         |
> > |                |         +--|-----------+         |
> > |   +-----+      |         |  |           |         |
> > |   | I2C +------+         |  |           |         |
> > |   +-----+      |         |  | CLOCK MAP |  AUD-IO |
> > |                |connector+--|-----------+   CARD  |
> > |   +-----+      |         |  |           |         |
> > |   | I2S +------+         |  |           |         |
> > |   +-----+      |         |  |           |         |
> > |                |         |  | INT MAP   |         |
> > |   +-----+      |         +--|-----------+         |
> > |   | I/O +------+         |  |           |         |
> > |   +-----+      +---------+  |           +---------+
> > +-----------------------------+
> >
> > [1]https://www.nxp.com/design/design-center/development-boards-and-
> designs/IMX95LPD5EVK-19
> > [2]https://docs.nxp.com/bundle/UM12022/page/topics/pcie_interface1.html
> 
> Best regards,
> Krzysztof