Messages in this thread |  | | Date | Thu, 30 Apr 2026 20:08:26 -0600 (MDT) | | From | Paul Walmsley <> | | Subject | Re: [PATCH 1/5] riscv: errata: Fix bitwise vs logical AND in MIPS errata patching |
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On Thu, 9 Apr 2026, Michael Neuling wrote:
> The condition checking whether a specific errata needs patching uses > logical AND (&&) instead of bitwise AND (&). Since logical AND only > checks that both operands are non-zero, this causes all errata patches > to be applied whenever any single errata is detected, rather than only > applying the matching one. > > The SiFive errata implementation correctly uses bitwise AND for the same > check. > > Fixes: 0b0ca959d2 ("riscv: errata: Fix the PAUSE Opcode for MIPS P8700") > Signed-off-by: Michael Neuling <mikey@neuling.org> > Assisted-by: Cursor:claude-4.6-opus-high-thinking
Thanks, after fixing the checkpatch warning regarding the Fixes: line in the patch description, queued for v7.1-rc.
- Paul
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