Messages in this thread Patch in this message |  | | Date | Mon, 27 Apr 2026 16:22:45 +0200 | | From | Andrew Lunn <> | | Subject | Re: [RFC Patch net-next v1 1/9] r8169: add some register definitions |
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On Mon, Apr 27, 2026 at 06:41:22AM +0000, Javen wrote: > >On 20.04.2026 04:19, javen wrote: > >> From: Javen Xu <javen_xu@realsil.com.cn> > >> > >> To support rss, this patch adds some macro definitions and register > >> definitions. > >> > >> Signed-off-by: Javen Xu <javen_xu@realsil.com.cn> > >> --- > >> drivers/net/ethernet/realtek/r8169_main.c | 75 > >> +++++++++++++++++++++++ > >> 1 file changed, 75 insertions(+) > >> > >> diff --git a/drivers/net/ethernet/realtek/r8169_main.c > >> b/drivers/net/ethernet/realtek/r8169_main.c > >> index 791277e750ba..0fbec27e4a0d 100644 > >> --- a/drivers/net/ethernet/realtek/r8169_main.c > >> +++ b/drivers/net/ethernet/realtek/r8169_main.c > >> @@ -77,6 +77,23 @@ > >> #define R8169_RX_RING_BYTES (NUM_RX_DESC * sizeof(struct RxDesc)) > >> #define R8169_TX_STOP_THRS (MAX_SKB_FRAGS + 1) > >> #define R8169_TX_START_THRS (2 * R8169_TX_STOP_THRS) > >> +#define R8169_MAX_RX_QUEUES 8 > >> +#define R8169_MAX_TX_QUEUES 1 > >> +#define R8169_MAX_MSIX_VEC 32 > >> +#define R8127_MAX_TX_QUEUES 1 > > > >Then why multi tx queue support? > > > >> +#define R8127_MAX_RX_QUEUES 8 > >> +#define R8127_MAX_IRQ 32 > >> +#define R8127_MIN_IRQ 30 > > > >This isn't self-explanatory. What do min and max refer to here? > > The hardware actually reserves a 64-bit interrupt status space for the new mapping in RTL8127. Although I don't think it is reasonable, its hardware design. > - Vector 0-7 (from reg 0x0d04): Rx queues > - Vector 8-15 (from reg 0x0d04): Tx queues > - Vector 29 (from reg 0x0d06): Link Status Change (LSC) > As the Link Status Change interrupt is fixed at vector index 29, we are forced to request a minimum of 30 MSI-X vectors from the PCI core.
Thanks for the explanation. Now please try to explain that in code, so developers can understand what the driver is doing and why.
Andrew
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