Messages in this thread Patch in this message |  | | Date | Mon, 13 Apr 2026 10:12:22 +0000 | | From | kpursoty@proton ... | | Subject | [PATCH 1/2] clocksource: timer-econet-en751221: fix timer block mapping at boot |
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timer_init() used DIV_ROUND_UP(num_possible_cpus(), 2) to determine how many register blocks to iomap. At early boot with VPE-based SMP, MIPS reports num_possible_cpus()=1 (VPEs not yet brought online), giving num_blocks=1. Only membase[0] is then mapped via of_iomap.
The EN751627 SoC has 2 physical cores, each with 2 VPEs, giving NR_CPUS=4 and two timer register blocks (one per core). Each block serves two VPEs: block 0 handles CPU0+CPU1 (core 0), block 1 handles CPU2+CPU3 (core 1). The block count is a silicon constant: DIV_ROUND_UP(NR_CPUS, 2) = 2.
cevt_init() calls cevt_dev_init(i) for each possible CPU via for_each_possible_cpu(). On EN7528/EN751627 with 4 VPEs, NR_CPUS=4 so cevt_dev_init(2) is called. cevt_dev_init(2) writes to reg_compare(2) which dereferences membase[2>>1] = membase[1], which is NULL:
CPU 0 Unable to handle kernel paging request at virtual address 00000008 epc : iowrite32+0x4/0x10 ra : cevt_dev_init+0x40/0x64
Fix: replace the runtime calculation with ECONET_NUM_BLOCKS, which is DIV_ROUND_UP(NR_CPUS, 2) evaluated at compile time. This is the same expression used to declare the membase[] array, so the loop bound and array size are provably consistent. For NR_CPUS=4 this is always 2, correctly mapping both register blocks regardless of how many VPEs are visible at early boot.
Fixes: 3b4c33ac87d0 ("clocksource/drivers: Add EcoNet Timer HPT driver") Signed-off-by: Kervin Pursoty <kpursoty@proton.me> --- drivers/clocksource/timer-econet-en751221.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/clocksource/timer-econet-en751221.c b/drivers/clocksource/timer-econet-en751221.c --- a/drivers/clocksource/timer-econet-en751221.c +++ b/drivers/clocksource/timer-econet-en751221.c @@ -160,7 +160,6 @@ static u64 notrace sched_clock_read(void) static int __init timer_init(struct device_node *np) { - int num_blocks = DIV_ROUND_UP(num_possible_cpus(), 2); struct clk *clk; int ret;
@@ -172,7 +171,7 @@ static int __init timer_init(struct device_node *np)
econet_timer.freq_hz = clk_get_rate(clk);
- for (int i = 0; i < num_blocks; i++) { + for (int i = 0; i < ECONET_NUM_BLOCKS; i++) { econet_timer.membase[i] = of_iomap(np, i); if (!econet_timer.membase[i]) { pr_err("%pOFn: failed to map register [%d]\n", np, i);
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