Messages in this thread Patch in this message |  | | From | Dapeng Mi <> | | Subject | [PATCH 1/2] perf/x86/intel: Clear stale ACR mask before updating new mask | | Date | Mon, 13 Apr 2026 09:01:56 +0800 |
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The current implementation forgets to clear the ACR mask before applying a new one. During event rescheduling, this allow bits from a previous stale ACR mask to persist, leading to an incorrect hardware state.
Ensure that the ACR mask is zeroed out before setting the new mask to prevent state pollution.
Cc: stable@vger.kernel.org Fixes: ec980e4facef ("perf/x86/intel: Support auto counter reload") Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com> --- arch/x86/events/intel/core.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c index 4768236c054b..58c236ce4747 100644 --- a/arch/x86/events/intel/core.c +++ b/arch/x86/events/intel/core.c @@ -3344,6 +3344,9 @@ static void intel_pmu_acr_late_setup(struct cpu_hw_events *cpuc) event = cpuc->event_list[j]; if (event->group_leader != leader->group_leader) break; + + /* Clear stale ACR mask first. */ + event->hw.config1 = 0; for_each_set_bit(idx, (unsigned long *)&event->attr.config2, X86_PMC_IDX_MAX) { if (i + idx >= cpuc->n_events || !is_acr_event_group(cpuc->event_list[i + idx])) -- 2.34.1
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