Messages in this thread |  | | From | Bartosz Golaszewski <> | | Date | Wed, 11 Mar 2026 09:03:37 +0100 | | Subject | Re: [PATCH v12 00/12] crypto/dmaengine: qce: introduce BAM locking and use DMA for register I/O |
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On Tue, Mar 10, 2026 at 4:44 PM Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com> wrote: > > This iteration is built on top of the v11 RFC with remaining issues > fixed and the mechanism for communicating the scratchpad address from > clients to the BAM driver changed from slave config to descriptor > metadata. > > However: during stress-testing I noticed that sometimes a transaction > would end with an error. The engine was indicating that a write/read to > the config registers was performed while the engine was busy (bit 17 of > the STATUS register was set). It turns out that we must not just > unconditionally append the UNLOCK descriptor to the "issued" queue, we > must wait for the transaction to end before we queue it so this version > takes this into account and queues the UNLOCK descriptor from the > workqueue. > > With this all stress tests and benchmarks from cryptsetup work fine. >
Mani, Stephan: sorry, I forgot to update the cover letter to Cc you. Doing it now here.
Stephan: I tried to use READ command but it would crash on sm8650, so I went with WRITE. :(
Bartosz
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