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SubjectRe: [PATCH v2 02/23] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
On Sat, Sep 06, 2025 at 04:53:23PM +0300, Svyatoslav Ryhel wrote:
> Tegra30 has CSI pad clock enable bits embedded into PLLD/PLLD2 registers.
> Add ids for these clocks. Additionally, move TEGRA30_CLK_CLK_MAX into
> clk-tegra30 source.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
> ---
> drivers/clk/tegra/clk-tegra30.c | 1 +
> include/dt-bindings/clock/tegra30-car.h | 3 ++-
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/tegra/clk-tegra30.c b/drivers/clk/tegra/clk-tegra30.c
> index ca367184e185..ca738bc64615 100644
> --- a/drivers/clk/tegra/clk-tegra30.c
> +++ b/drivers/clk/tegra/clk-tegra30.c
> @@ -53,6 +53,7 @@
> #define SYSTEM_CLK_RATE 0x030
>
> #define TEGRA30_CLK_PERIPH_BANKS 5
> +#define TEGRA30_CLK_CLK_MAX 311

Unused define drop.

Also, don't mix bindings and drivers. You cannot create such
dependencies.

Best regards,
Krzysztof


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