Messages in this thread |  | | Date | Wed, 21 May 2025 16:25:57 +0100 | | From | Conor Dooley <> | | Subject | Re: [PATCH v3 1/3] dt-bindings: stm32: add STM32MP21 clocks and reset bindings |
| |
On Wed, May 21, 2025 at 02:38:49PM +0200, Gabriel Fernandez wrote: > Adds clock and reset binding entries for STM32MP21 SoC family. > > Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com> > Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com> > --- > .../bindings/clock/st,stm32mp21-rcc.yaml | 199 ++++++++++ > include/dt-bindings/clock/st,stm32mp21-rcc.h | 426 +++++++++++++++++++++ > include/dt-bindings/reset/st,stm32mp21-rcc.h | 138 +++++++ > 3 files changed, 763 insertions(+) > > diff --git a/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml b/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml > new file mode 100644 > index 0000000000000000000000000000000000000000..d41f0b963aceee534acea77bc9d276fd0c9b1548 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/st,stm32mp21-rcc.yaml > @@ -0,0 +1,199 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/clock/st,stm32mp21-rcc.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: STM32MP21 Reset Clock Controller > + > +maintainers: > + - Gabriel Fernandez <gabriel.fernandez@foss.st.com> > + > +description: | > + The RCC hardware block is both a reset and a clock controller. > + RCC makes also power management (resume/suspend). > + > + See also::
I believe you missing some comments from Rob about removing the :: from here, and from the source you copied it from (if one exists).
Otherwise,
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
> + include/dt-bindings/clock/st,stm32mp21-rcc.h > + include/dt-bindings/reset/st,stm32mp21-rcc.h [unhandled content-type:application/pgp-signature] |  |