Messages in this thread |  | | From | Vijay Balakrishna <> | | Subject | [PATCH v6 0/2] Add L1 and L2 error detection for A53, A57 and A72 | | Date | Wed, 9 Apr 2025 16:36:23 -0700 |
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Hello,
This is an attempt to revive [v5] series. I have attempted to address comments and suggestions from Marc Zyngier since [v5]. Additionally, I have extended support for A72 processors. Testing on a problematic A72 SoC has led to the detection of Correctable Errors (CEs). I am eager to hear your suggestions and feedback on this series.
Thanks, Vijay
[v5] https://lore.kernel.org/all/20210401110615.15326-1-s.hauer@pengutronix.de/#t
Changes since v5: - rebase on v6.15-rc1 - the syndrome registers for CPU/L2 memory errors are cleared only upon detecting an error and an isb() after for synchronization (Marc) - "edac-enabled" hunk moved to initial patch to avoid breaking virtual environments (Marc) - to ensure compatibility across all three families, we are not reporting "L1 Dirty RAM," documented only in the A53 TRM - above prompted changing default CPU L1 error meesage from "unknown" to "Unspecified" - capturing CPUID/WAY information in L2 memory error log (Marc) - module license from "GPL v2" to "GPL" (checkpatch.pl warning) - extend support for A72
Changes since v4: - Rebase on v5.12-rc5
Changes since v3: - Add edac-enabled property to make EDAC 3support optional
Changes since v2: - drop usage of virtual dt node (Robh) - use read_sysreg_s instead of open coded variant (James Morse) - separate error retrieving from error reporting - use smp_call_function_single rather than smp_call_function_single_async - make driver single instance and register all 'cpu' hierarchy up front once
Changes since v1: - Split dt-binding into separate patch - Sort local function variables in reverse-xmas tree order - drop unnecessary comparison and make variable bool
Sascha Hauer (2): drivers/edac: Add L1 and L2 error detection for A53, A57 and A72 dt-bindings: arm: cpus: Add edac-enabled property
.../devicetree/bindings/arm/cpus.yaml | 6 + drivers/edac/Kconfig | 9 + drivers/edac/Makefile | 1 + drivers/edac/cortex_arm64_l1_l2.c | 225 ++++++++++++++++++ 4 files changed, 241 insertions(+) create mode 100644 drivers/edac/cortex_arm64_l1_l2.c
base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8 -- 2.49.0
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