Messages in this thread | ![/](/images/icornerl.gif) | | Date | Sat, 4 May 2024 14:01:24 +0200 | From | Francesco Dolcini <> | Subject | Re: [PATCH 10/18] clk: imx: Remove CLK_SET_PARENT_GATE for DRAM mux for i.MX7D |
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Hello Peng,
On Sat, May 04, 2024 at 08:49:03AM +0800, Peng Fan (OSS) wrote: > From: Peng Fan <peng.fan@nxp.com> > > For i.MX7D DRAM related mux clock, the clock source change should ONLY > be done done in low level asm code without accessing DRAM, and then > calling clk API to sync the HW clock status with clk tree, it should never > touch real clock source switch via clk API, so CLK_SET_PARENT_GATE flag > should NOT be added, otherwise, DRAM's clock parent will be disabled when > DRAM is active, and system will hang.
From the description this is solving a system hang, but no fixes tag nor cc stable.
Francesco
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