Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | From | Frank Li <> | Date | Mon, 20 May 2024 12:09:17 -0400 | Subject | [PATCH v2 6/6] arm64: dts: imx8dxl-ss-conn: add gpmi nand |
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Update gpmi nand and dma_apbh interrupt number for imx8dxl.
Signed-off-by: Frank Li <Frank.Li@nxp.com> --- arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi index 6d13e4fafb761..1e02b04494e94 100644 --- a/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8dxl-ss-conn.dtsi @@ -108,6 +108,13 @@ usb2_2_lpcg: clock-controller@5b280000 { }; +&dma_apbh { + interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; +}; + &enet0_lpcg { clocks = <&conn_enet0_root_clk>, <&conn_enet0_root_clk>, @@ -127,6 +134,10 @@ &fec1 { assigned-clock-rates = <125000000>; }; +&gpmi { + interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; +}; + &usdhc1 { compatible = "fsl,imx8dxl-usdhc", "fsl,imx8qxp-usdhc"; interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; -- 2.34.1
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