lkml.org 
[lkml]   [2024]   [Apr]   [4]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
    Patch in this message
    /
    From
    Subject[PATCH 05/17] arm64: dts: exynos: gs101: enable cmu-hsi2 clock controller
    Date
    Enable the cmu_hsi2 clock management unit. It feeds some of
    the high speed interfaces such as PCIe and UFS.

    Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
    ---
    arch/arm64/boot/dts/exynos/google/gs101.dtsi | 12 ++++++++++++
    1 file changed, 12 insertions(+)

    diff --git a/arch/arm64/boot/dts/exynos/google/gs101.dtsi b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
    index eddb6b326fde..38ac4fb1397e 100644
    --- a/arch/arm64/boot/dts/exynos/google/gs101.dtsi
    +++ b/arch/arm64/boot/dts/exynos/google/gs101.dtsi
    @@ -1253,6 +1253,18 @@ pinctrl_hsi1: pinctrl@11840000 {
    interrupts = <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH 0>;
    };

    + cmu_hsi2: clock-controller@14400000 {
    + compatible = "google,gs101-cmu-hsi2";
    + reg = <0x14400000 0x4000>;
    + #clock-cells = <1>;
    + clocks = <&ext_24_5m>,
    + <&cmu_top CLK_DOUT_CMU_HSI2_BUS>,
    + <&cmu_top CLK_DOUT_CMU_HSI2_PCIE>,
    + <&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
    + <&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
    + clock-names = "oscclk", "bus", "pcie", "ufs_embd", "mmc_card";
    + };
    +
    pinctrl_hsi2: pinctrl@14440000 {
    compatible = "google,gs101-pinctrl";
    reg = <0x14440000 0x00001000>;
    --
    2.44.0.478.gd926399ef9-goog

    \
     
     \ /
      Last update: 2024-05-27 16:23    [W:6.174 / U:0.828 seconds]
    ©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site