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Subject[PATCH net-next v8 0/2] Enable RX HW timestamp for PTP packets using CPTS FIFO
The CPSW offers two mechanisms for communicating packet ingress timestamp
information to the host.

The first mechanism is via the CPTS Event FIFO which records timestamp
when triggered by certain events. One such event is the reception of an
Ethernet packet with a specified EtherType field. This is used to capture
ingress timestamps for PTP packets. With this mechanism the host must
read the timestamp (from the CPTS FIFO) separately from the packet payload
which is delivered via DMA.

In the second mechanism of timestamping, CPSW driver enables hardware
timestamping for all received packets by setting the TSTAMP_EN bit in
CPTS_CONTROL register, which directs the CPTS module to timestamp all
received packets, followed by passing timestamp via DMA descriptors.
This mechanism is responsible for triggering errata i2401:
"CPSW: Host Timestamps Cause CPSW Port to Lock up."

The errata affects all K3 SoCs. Link to errata for AM64x:

As a workaround we can use first mechanism to timestamp received

Series is based on linux-next tagged next-20240419.

Link to v7:

Changes from v7 to v8:
- Removed empty lines between trailers in [PATCH v7 2/2] as suggested
by Jakub.

Chintan Vankar (2):
net: ethernet: ti: am65-cpts: Enable RX HW timestamp for PTP packets
net: ethernet: ti: am65-cpsw/ethtool: Enable RX HW timestamp only for
PTP packets

drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 13 ++-
drivers/net/ethernet/ti/am65-cpsw-nuss.c | 51 +++++-----
drivers/net/ethernet/ti/am65-cpts.c | 107 ++++++++++++++------
drivers/net/ethernet/ti/am65-cpts.h | 11 +-
4 files changed, 118 insertions(+), 64 deletions(-)


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