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SubjectRe: [PATCH v3 2/7] clk: qcom: gcc-ipq9574: Add PCIe pipe clocks
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Quoting Alexandru Gagniuc (2024-04-15 11:20:47)
> diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
> index 0a3f846695b8..c748d2f124f3 100644
> --- a/drivers/clk/qcom/gcc-ipq9574.c
> +++ b/drivers/clk/qcom/gcc-ipq9574.c
> @@ -1569,6 +1569,24 @@ static struct clk_regmap_phy_mux pcie0_pipe_clk_src = {
> },
> };
>
> +static struct clk_branch gcc_pcie0_pipe_clk = {
> + .halt_reg = 0x28044,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x28044,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){
> + .name = "gcc_pcie0_pipe_clk",
> + .parent_hws = (const struct clk_hw *[]) {
> + &pcie0_pipe_clk_src.clkr.hw
> + },
> + .num_parents = 1,
> + .flags = CLK_SET_RATE_PARENT,
> + .ops = &clk_branch2_ops,
> + },
> + },
> +};
> +
> static struct clk_regmap_phy_mux pcie1_pipe_clk_src = {
> .reg = 0x29064,
> .clkr = {
> @@ -1583,6 +1601,24 @@ static struct clk_regmap_phy_mux pcie1_pipe_clk_src = {
> },
> };
>
> +static struct clk_branch gcc_pcie1_pipe_clk = {
> + .halt_reg = 0x29044,
> + .halt_check = BRANCH_HALT_DELAY,
> + .clkr = {
> + .enable_reg = 0x29044,
> + .enable_mask = BIT(0),
> + .hw.init = &(struct clk_init_data){

const clk_init_data please.

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