Messages in this thread | ![/](/images/icornerl.gif) | | Date | Sun, 14 Apr 2024 08:55:54 -0700 | Subject | Re: [PATCH 2/6] dt-bindings: mmc: Add support for BCM2712 SD host controller | From | Florian Fainelli <> |
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On 4/13/2024 3:14 PM, Andrea della Porta wrote: > Signed-off-by: Andrea della Porta <andrea.porta@suse.com> > --- > .../bindings/mmc/brcm,sdhci-brcmstb.yaml | 51 ++++++++++++++++++- > 1 file changed, 50 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml > index cbd3d6c6c77f..6aa137d78e4f 100644 > --- a/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml > +++ b/Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml > @@ -13,6 +13,7 @@ maintainers: > properties: > compatible: > oneOf: > + - const: brcm,bcm2712-sdhci > - items: > - enum: > - brcm,bcm7216-sdhci > @@ -26,12 +27,16 @@ properties: > - const: brcm,sdhci-brcmstb > > reg: > - maxItems: 2 > + minItems: 2 > + maxItems: 4 > > reg-names: > + minItems: 2 > items: > - const: host > - const: cfg > + - const: busisol > + - const: lcpll > > interrupts: > maxItems: 1 > @@ -60,6 +65,7 @@ properties: > description: Specifies that controller should use auto CMD12 > > allOf: > + - $ref: sdhci-common.yaml > - $ref: mmc-controller.yaml# > - if: > properties: > @@ -71,6 +77,28 @@ allOf: > required: > - clock-frequency > > + - if: > + properties: > + compatible: > + contains: > + const: brcm,bcm2712-sdhci > + > + then: > + properties: > + reg: > + maxItems: 4 > + clock-names: > + const: "sw_sdio" > + > + else: > + properties: > + reg: > + minItems: 2 > + maxItems: 2 > + reg-names: > + minItems: 2 > + maxItems: 2 > + > required: > - compatible > - reg > @@ -114,3 +142,24 @@ examples: > clocks = <&scmi_clk 245>; > clock-names = "sw_sdio"; > }; > + > + - | > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + > + mmc@fff000 { > + compatible = "brcm,bcm2712-sdhci"; > + reg = <0x10 0x00fff000 0x0 0x260>, > + <0x10 0x00fff400 0x0 0x200>, > + <0x10 0x015040b0 0x0 0x4>, // Bus isolation control
That should be a syscon, not under direct management of the driver because there are other bits in that register that are relevant here.
> + <0x10 0x015200f0 0x0 0x24>; // LCPLL control misc0-8
And likewise, this should be a clock provider, or the firmware could add support for configuring the LCPLL since there are other things going on there. -- Florian [unhandled content-type:application/pkcs7-signature]
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