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SubjectRe: [RFC PATCH 06/41] perf: x86: Add function to switch PMI handler
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On 4/12/2024 3:17 AM, Sean Christopherson wrote:
> On Fri, Jan 26, 2024, Xiong Zhang wrote:
>> From: Xiong Zhang <xiong.y.zhang@intel.com>
>>
>> Add function to switch PMI handler since passthrough PMU and host PMU will
>> use different interrupt vectors.
>>
>> Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
>> Signed-off-by: Mingwei Zhang <mizhang@google.com>
>> ---
>> arch/x86/events/core.c | 15 +++++++++++++++
>> arch/x86/include/asm/perf_event.h | 3 +++
>> 2 files changed, 18 insertions(+)
>>
>> diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
>> index 40ad1425ffa2..3f87894d8c8e 100644
>> --- a/arch/x86/events/core.c
>> +++ b/arch/x86/events/core.c
>> @@ -701,6 +701,21 @@ struct perf_guest_switch_msr *perf_guest_get_msrs(int *nr, void *data)
>> }
>> EXPORT_SYMBOL_GPL(perf_guest_get_msrs);
>>
>> +void perf_guest_switch_to_host_pmi_vector(void)
>> +{
>> + lockdep_assert_irqs_disabled();
>> +
>> + apic_write(APIC_LVTPC, APIC_DM_NMI);
>> +}
>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_host_pmi_vector);
>> +
>> +void perf_guest_switch_to_kvm_pmi_vector(void)
>> +{
>> + lockdep_assert_irqs_disabled();
>> +
>> + apic_write(APIC_LVTPC, APIC_DM_FIXED | KVM_VPMU_VECTOR);
>> +}
>> +EXPORT_SYMBOL_GPL(perf_guest_switch_to_kvm_pmi_vector);
>
> Why slice and dice the context switch if it's all in perf? Just do this in
> perf_guest_enter().
>
As perf_guest_enter() is in perf core which manages all PMUs, while switch_pmi_vector is for x86 core PMU only, so switch_pmi_vector is put in x86 pmu driver. pmu driver can call perf core function directly, perf core manage pmu through pmu->ops and pmu->flags. If switch_pmi_vector is called in perf_guest_enter, extra interfaces will be added into pmu->ops, this impacts other PMU driver.

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