Messages in this thread | | | Date | Wed, 10 Apr 2024 08:07:32 +0200 | Subject | Re: [PATCH riscv/fixes] riscv: hwprobe: fix invalid sign extension for RISCV_HWPROBE_EXT_ZVFHMIN | From | Alexandre Ghiti <> |
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Hi Clément,
On 09/04/2024 16:38, Clément Léger wrote: > The current definition yields a negative 32bits signed value which > result in a mask with is obviously incorrect. Replace it by using a > 1ULL bit shift value to obtain a single set bit mask. > > Fixes: 5dadda5e6a59 ("riscv: hwprobe: export Zvfh[min] ISA extensions") > Signed-off-by: Clément Léger <cleger@rivosinc.com> > --- > arch/riscv/include/uapi/asm/hwprobe.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/riscv/include/uapi/asm/hwprobe.h b/arch/riscv/include/uapi/asm/hwprobe.h > index 9f2a8e3ff204..2902f68dc913 100644 > --- a/arch/riscv/include/uapi/asm/hwprobe.h > +++ b/arch/riscv/include/uapi/asm/hwprobe.h > @@ -54,7 +54,7 @@ struct riscv_hwprobe { > #define RISCV_HWPROBE_EXT_ZFHMIN (1 << 28) > #define RISCV_HWPROBE_EXT_ZIHINTNTL (1 << 29) > #define RISCV_HWPROBE_EXT_ZVFH (1 << 30) > -#define RISCV_HWPROBE_EXT_ZVFHMIN (1 << 31) > +#define RISCV_HWPROBE_EXT_ZVFHMIN (1ULL << 31) > #define RISCV_HWPROBE_EXT_ZFA (1ULL << 32) > #define RISCV_HWPROBE_EXT_ZTSO (1ULL << 33) > #define RISCV_HWPROBE_EXT_ZACAS (1ULL << 34)
Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Thanks,
Alex
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