| Subject | Re: [PATCH 04/11] clk: divider: Introduce CLK_DIVIDER_EVEN_INTEGERS flag | From | Stephen Boyd <> | Date | Wed, 10 Apr 2024 20:06:34 -0700 |
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Quoting Théo Lebrun (2024-04-10 10:12:33) > index 4a537260f655..cb348e502e41 100644 > --- a/include/linux/clk-provider.h > +++ b/include/linux/clk-provider.h > @@ -675,13 +675,15 @@ struct clk_div_table { > * CLK_DIVIDER_BIG_ENDIAN - By default little endian register accesses are used > * for the divider register. Setting this flag makes the register accesses > * big endian. > + * CLK_DIVIDER_EVEN_INTEGERS - clock divisor is 2, 4, 6, 8, 10, etc. > + * Formula is 2 * (value read from hardware + 1). > */ > struct clk_divider { > struct clk_hw hw; > void __iomem *reg; > u8 shift; > u8 width; > - u8 flags; > + u16 flags;
This can stay u8
> const struct clk_div_table *table; > spinlock_t *lock; > };
We should add a kunit test.
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