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    Subject[PATCH v2 3/3] arm64: dts: qcom: qcm2290: Add LMH node
    From: Loic Poulain <loic.poulain@linaro.org>

    Add a node for the Limits Management Hardware to ensure it can be
    configured by the operating system.

    Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
    [Konrad: add commit msg, rebase]
    Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
    ---
    arch/arm64/boot/dts/qcom/qcm2290.dtsi | 14 +++++++++++++-
    1 file changed, 13 insertions(+), 1 deletion(-)

    diff --git a/arch/arm64/boot/dts/qcom/qcm2290.dtsi b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
    index 89beac833d43..1aacad50e7fc 100644
    --- a/arch/arm64/boot/dts/qcom/qcm2290.dtsi
    +++ b/arch/arm64/boot/dts/qcom/qcm2290.dtsi
    @@ -1858,7 +1858,7 @@ cpufreq_hw: cpufreq@f521000 {
    compatible = "qcom,qcm2290-cpufreq-hw", "qcom,cpufreq-hw";
    reg = <0x0 0x0f521000 0x0 0x1000>;
    reg-names = "freq-domain0";
    - interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
    + interrupts-extended = <&lmh_cluster 0>;
    interrupt-names = "dcvsh-irq-0";
    clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0>;
    clock-names = "xo", "alternate";
    @@ -1866,6 +1866,18 @@ cpufreq_hw: cpufreq@f521000 {
    #freq-domain-cells = <1>;
    #clock-cells = <1>;
    };
    +
    + lmh_cluster: lmh@f550800 {
    + compatible = "qcom,qcm2290-lmh", "qcom,sm8150-lmh";
    + reg = <0x0 0x0f550800 0x0 0x400>;
    + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
    + cpus = <&CPU0>;
    + qcom,lmh-temp-arm-millicelsius = <65000>;
    + qcom,lmh-temp-low-millicelsius = <94500>;
    + qcom,lmh-temp-high-millicelsius = <95000>;
    + interrupt-controller;
    + #interrupt-cells = <1>;
    + };
    };

    thermal-zones {
    --
    2.44.0


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