Messages in this thread Patch in this message | | | From | Dmitry Rokosov <> | Subject | [PATCH v1 2/4] clk: meson: a1: pll: determine maximum register in regmap config | Date | Wed, 20 Mar 2024 18:54:46 +0300 |
| |
When the max_register value is not set, the regmap debugfs 'registers' file does not display the entire range of the regmap.
Signed-off-by: Dmitry Rokosov <ddrokosov@salutedevices.com> --- drivers/clk/meson/a1-pll.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/drivers/clk/meson/a1-pll.c b/drivers/clk/meson/a1-pll.c index 00e06d03445b..60b2e53e7e51 100644 --- a/drivers/clk/meson/a1-pll.c +++ b/drivers/clk/meson/a1-pll.c @@ -299,6 +299,7 @@ static struct regmap_config a1_pll_regmap_cfg = { .reg_bits = 32, .val_bits = 32, .reg_stride = 4, + .max_register = ANACTRL_HIFIPLL_STS, }; static struct meson_clk_hw_data a1_pll_clks = { -- 2.43.0
| |