Messages in this thread | | | Date | Mon, 18 Mar 2024 16:30:23 +0100 | From | Neil Armstrong <> | Subject | Re: [PATCH v2 2/3] arm64: dts: qcom: sm8650: add support for the SM8650-HDK board |
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On 18/03/2024 15:43, Bjorn Andersson wrote: > On Mon, Mar 18, 2024 at 10:51:54AM +0100, Neil Armstrong wrote: > [..] >> diff --git a/arch/arm64/boot/dts/qcom/sm8650-hdk.dts b/arch/arm64/boot/dts/qcom/sm8650-hdk.dts > [..] >> + vph_pwr: vph-pwr-regulator { >> + compatible = "regulator-fixed"; >> + >> + regulator-name = "vph_pwr"; >> + regulator-min-microvolt = <3700000>; >> + regulator-max-microvolt = <3700000>; >> + >> + regulator-always-on; >> + regulator-boot-on; >> + }; >> + >> + vreg_bob_3v3: regulator-vreg-bob-3v3 { > > It would be nice if these nodes where sorted alphabetically.
damn, ok
> >> + compatible = "regulator-fixed"; >> + >> + regulator-name = "VREG_BOB_3P3"; >> + regulator-min-microvolt = <3300000>; >> + regulator-max-microvolt = <3300000>; >> + >> + vin-supply = <&vph_pwr>; >> + }; >> + >> + wcd939x: audio-codec { >> + compatible = "qcom,wcd9395-codec", "qcom,wcd9390-codec"; >> + >> + pinctrl-0 = <&wcd_default>; >> + pinctrl-names = "default"; >> + >> + qcom,micbias1-microvolt = <1800000>; >> + qcom,micbias2-microvolt = <1800000>; >> + qcom,micbias3-microvolt = <1800000>; >> + qcom,micbias4-microvolt = <1800000>; >> + qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>; >> + qcom,mbhc-headset-vthreshold-microvolt = <1700000>; >> + qcom,mbhc-headphone-vthreshold-microvolt = <50000>; >> + qcom,rx-device = <&wcd_rx>; >> + qcom,tx-device = <&wcd_tx>; >> + >> + reset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>; >> + >> + vdd-buck-supply = <&vreg_l15b_1p8>; >> + vdd-rxtx-supply = <&vreg_l15b_1p8>; >> + vdd-io-supply = <&vreg_l15b_1p8>; >> + vdd-mic-bias-supply = <&vreg_bob1>; >> + >> + #sound-dai-cells = <1>; >> + }; >> +}; > [..] >> +&mdss_mdp { >> + status = "okay"; > > On other platforms we left status = okay on the mdp child node, as it's > pretty rare that you want mdss okay, but mdp disabled...
Sure, but this is quite unrelated to HDK
> >> +}; >> + >> +&pcie0 { >> + wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; >> + perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; >> + >> + pinctrl-0 = <&pcie0_default_state>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> +}; >> + >> +&pcie0_phy { >> + vdda-phy-supply = <&vreg_l1i_0p88>; >> + vdda-pll-supply = <&vreg_l3i_1p2>; >> + >> + status = "okay"; >> +}; >> + >> +&pcie1 { >> + wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; >> + perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; >> + >> + pinctrl-0 = <&pcie1_default_state>; >> + pinctrl-names = "default"; >> + >> + status = "okay"; >> +}; >> + >> +&pcie1_phy { >> + vdda-phy-supply = <&vreg_l3e_0p9>; >> + vdda-pll-supply = <&vreg_l3i_1p2>; >> + vdda-qref-supply = <&vreg_l1i_0p88>; >> + >> + status = "okay"; >> +}; >> + >> +&pcie_1_phy_aux_clk { >> + clock-frequency = <1000>; > > Is that so?
This is how the pcie_1_phy_aux_clk was documented on SM8550 and SM8650 and downstream uses the same clock-frequency.
Neil > >> +}; >> + > > Regards, > Bjorn
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