Messages in this thread | | | From | Anup Patel <> | Date | Wed, 13 Mar 2024 10:04:52 +0530 | Subject | Re: [PATCH] irqchip/riscv-intc: Fix use of AIA IRQs 32-63 on riscv32 |
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On Wed, Mar 13, 2024 at 2:58 AM Samuel Holland <samuel.holland@sifive.com> wrote: > > riscv_intc_custom_base is initialized to BITS_PER_LONG, so the second > check passes even though AIA provides 64 IRQs. Adjust the condition to > only check the custom IRQ range for IRQs outside the standard range, and > adjust the standard range when AIA is available. > > Fixes: bb7921cdea12 ("irqchip/riscv-intc: Add support for RISC-V AIA") > Fixes: e6bd9b966dc8 ("irqchip/riscv-intc: Fix low-level interrupt handler setup for AIA") > Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
I missed adjusting riscv_intc_nr_irqs in commit e6bd9b966dc8. Thanks for catching.
Reviewed-by: Anup Patel <anup@brainfault.org>
Regards, Anup
> --- > > drivers/irqchip/irq-riscv-intc.c | 13 ++++++++----- > 1 file changed, 8 insertions(+), 5 deletions(-) > > diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c > index f87aeab460eb..9e71c4428814 100644 > --- a/drivers/irqchip/irq-riscv-intc.c > +++ b/drivers/irqchip/irq-riscv-intc.c > @@ -149,8 +149,9 @@ static int riscv_intc_domain_alloc(struct irq_domain *domain, > * Only allow hwirq for which we have corresponding standard or > * custom interrupt enable register. > */ > - if ((hwirq >= riscv_intc_nr_irqs && hwirq < riscv_intc_custom_base) || > - (hwirq >= riscv_intc_custom_base + riscv_intc_custom_nr_irqs)) > + if (hwirq >= riscv_intc_nr_irqs && > + (hwirq < riscv_intc_custom_base || > + hwirq >= riscv_intc_custom_base + riscv_intc_custom_nr_irqs)) > return -EINVAL; > > for (i = 0; i < nr_irqs; i++) { > @@ -183,10 +184,12 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn, struct irq_ch > return -ENXIO; > } > > - if (riscv_isa_extension_available(NULL, SxAIA)) > + if (riscv_isa_extension_available(NULL, SxAIA)) { > + riscv_intc_nr_irqs = 64; > rc = set_handle_irq(&riscv_intc_aia_irq); > - else > + } else { > rc = set_handle_irq(&riscv_intc_irq); > + } > if (rc) { > pr_err("failed to set irq handler\n"); > return rc; > @@ -195,7 +198,7 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn, struct irq_ch > riscv_set_intc_hwnode_fn(riscv_intc_hwnode); > > pr_info("%d local interrupts mapped%s\n", > - riscv_isa_extension_available(NULL, SxAIA) ? 64 : riscv_intc_nr_irqs, > + riscv_intc_nr_irqs, > riscv_isa_extension_available(NULL, SxAIA) ? " using AIA" : ""); > if (riscv_intc_custom_nr_irqs) > pr_info("%d custom local interrupts mapped\n", riscv_intc_custom_nr_irqs); > -- > 2.43.1 >
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