Messages in this thread | | | Date | Wed, 7 Feb 2024 09:45:59 +0000 | From | Oliver Upton <> | Subject | Re: [PATCH] arm64: errata: Minimize tlb flush due to vttbr writes on AmpereOne |
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On Wed, Feb 07, 2024 at 01:04:58AM -0800, Ganapatrao Kulkarni wrote: > AmpereOne implementation is doing tlb flush when ever there is > a write to vttbr_el2. As per KVM implementation, vttbr_el2 is updated > with VM's S2-MMU while return to VM. This is not necessary when there > is no VM context switch and a just return to same Guest. > > Adding a check to avoid the vttbr_el2 write if the same value > already exist to prevent needless tlb flush.
Sorry, zero interest in taking what is really a uarch optimization. The errata framework exists to allow the kernel achieve *correctness* on a variety of hardware and is not a collection of party tricks for optimizing any given implementation.
Think of the precedent this would establish. What would stop implementers from, say, changing out our memcpy implementation into a a hundred different uarch-specific routines. That isn't maintainable, nor is it even testable as most folks don't have access to your hardware.
Ignoring all of that -- I question the necessity of these patches altogether. KVM writes to VTTBR at the time of vcpu load as of commit 934bf871f011 ("KVM: arm64: Load the stage-2 MMU context in kvm_vcpu_load_vhe()"), which should drastically reduce the overhead of this hardware fix.
-- Thanks, Oliver
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