Messages in this thread Patch in this message | ![/](/images/icornerl.gif) | | Date | Tue, 06 Feb 2024 15:49:23 -0300 | From | Marcelo Tosatti <> | Subject | [patch 12/12] x86/cacheinfo.c: check for block interference CPUs |
| |
Change amd_set_l3_disable_slot to check for block interference cpumask, and avoid the IPI if set.
Also change wbinvd_on_cpu to use smp_call_function_single_fail.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Index: linux-isolation/arch/x86/include/asm/smp.h =================================================================== --- linux-isolation.orig/arch/x86/include/asm/smp.h +++ linux-isolation/arch/x86/include/asm/smp.h @@ -118,7 +118,7 @@ int native_cpu_disable(void); void __noreturn hlt_play_dead(void); void native_play_dead(void); void play_dead_common(void); -void wbinvd_on_cpu(int cpu); +int wbinvd_on_cpu(int cpu); int wbinvd_on_all_cpus(void); void smp_kick_mwait_play_dead(void); Index: linux-isolation/arch/x86/kernel/cpu/cacheinfo.c =================================================================== --- linux-isolation.orig/arch/x86/kernel/cpu/cacheinfo.c +++ linux-isolation/arch/x86/kernel/cpu/cacheinfo.c @@ -17,6 +17,7 @@ #include <linux/sysfs.h> #include <linux/pci.h> #include <linux/stop_machine.h> +#include <linux/sched/isolation.h> #include <asm/cpufeature.h> #include <asm/cacheinfo.h> @@ -396,6 +397,7 @@ static void amd_l3_disable_index(struct * disable index in all 4 subcaches */ for (i = 0; i < 4; i++) { + int ret; u32 reg = idx | (i << 20); if (!nb->l3_cache.subcaches[i]) @@ -409,6 +411,7 @@ static void amd_l3_disable_index(struct * is not sufficient. */ ret = wbinvd_on_cpu(cpu); + WARN_ON(ret == -EPERM); reg |= BIT(31); pci_write_config_dword(nb->misc, 0x1BC + slot * 4, reg); @@ -428,7 +431,7 @@ static void amd_l3_disable_index(struct static int amd_set_l3_disable_slot(struct amd_northbridge *nb, int cpu, unsigned slot, unsigned long index) { - int ret = 0; + int idx, ret = 0; /* check if @slot is already used or the index is already disabled */ ret = amd_get_l3_disable_slot(nb, slot); @@ -442,7 +445,15 @@ static int amd_set_l3_disable_slot(struc if (index == amd_get_l3_disable_slot(nb, !slot)) return -EEXIST; - amd_l3_disable_index(nb, cpu, slot, index); + ret = 0; + idx = block_interf_srcu_read_lock(); + + if (block_interf_cpu(cpu)) + ret = -EPERM; + else + amd_l3_disable_index(nb, cpu, slot, index); + + block_interf_srcu_read_unlock(idx); return 0; } Index: linux-isolation/arch/x86/lib/cache-smp.c =================================================================== --- linux-isolation.orig/arch/x86/lib/cache-smp.c +++ linux-isolation/arch/x86/lib/cache-smp.c @@ -7,9 +7,9 @@ static void __wbinvd(void *dummy) wbinvd(); } -void wbinvd_on_cpu(int cpu) +int wbinvd_on_cpu(int cpu) { - smp_call_function_single(cpu, __wbinvd, NULL, 1); + return smp_call_function_single_fail(cpu, __wbinvd, NULL, 1); } EXPORT_SYMBOL(wbinvd_on_cpu);
| ![\](/images/icornerr.gif) |