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    Subject[PATCH AUTOSEL 6.6 21/21] arm64/sve: Lower the maximum allocation for the SVE ptrace regset
    Date
    From: Mark Brown <broonie@kernel.org>

    [ Upstream commit 2813926261e436d33bc74486b51cce60b76edf78 ]

    Doug Anderson observed that ChromeOS crashes are being reported which
    include failing allocations of order 7 during core dumps due to ptrace
    allocating storage for regsets:

    chrome: page allocation failure: order:7,
    mode:0x40dc0(GFP_KERNEL|__GFP_COMP|__GFP_ZERO),
    nodemask=(null),cpuset=urgent,mems_allowed=0
    ...
    regset_get_alloc+0x1c/0x28
    elf_core_dump+0x3d8/0xd8c
    do_coredump+0xeb8/0x1378

    with further investigation showing that this is:

    [ 66.957385] DOUG: Allocating 279584 bytes

    which is the maximum size of the SVE regset. As Doug observes it is not
    entirely surprising that such a large allocation of contiguous memory might
    fail on a long running system.

    The SVE regset is currently sized to hold SVE registers with a VQ of
    SVE_VQ_MAX which is 512, substantially more than the architectural maximum
    of 16 which we might see even in a system emulating the limits of the
    architecture. Since we don't expose the size we tell the regset core
    externally let's define ARCH_SVE_VQ_MAX with the actual architectural
    maximum and use that for the regset, we'll still overallocate most of the
    time but much less so which will be helpful even if the core is fixed to
    not require contiguous allocations.

    Specify ARCH_SVE_VQ_MAX in terms of the maximum value that can be written
    into ZCR_ELx.LEN (where this is set in the hardware). For consistency
    update the maximum SME vector length to be specified in the same style
    while we are at it.

    We could also teach the ptrace core about runtime discoverable regset sizes
    but that would be a more invasive change and this is being observed in
    practical systems.

    Reported-by: Doug Anderson <dianders@chromium.org>
    Signed-off-by: Mark Brown <broonie@kernel.org>
    Tested-by: Douglas Anderson <dianders@chromium.org>
    Link: https://lore.kernel.org/r/20240213-arm64-sve-ptrace-regset-size-v2-1-c7600ca74b9b@kernel.org
    Signed-off-by: Will Deacon <will@kernel.org>
    Signed-off-by: Sasha Levin <sashal@kernel.org>
    ---
    arch/arm64/include/asm/fpsimd.h | 12 ++++++------
    arch/arm64/kernel/ptrace.c | 3 ++-
    2 files changed, 8 insertions(+), 7 deletions(-)

    diff --git a/arch/arm64/include/asm/fpsimd.h b/arch/arm64/include/asm/fpsimd.h
    index 8df46f186c64b..9bc2b0c9a4fee 100644
    --- a/arch/arm64/include/asm/fpsimd.h
    +++ b/arch/arm64/include/asm/fpsimd.h
    @@ -36,13 +36,13 @@
    * When we defined the maximum SVE vector length we defined the ABI so
    * that the maximum vector length included all the reserved for future
    * expansion bits in ZCR rather than those just currently defined by
    - * the architecture. While SME follows a similar pattern the fact that
    - * it includes a square matrix means that any allocations that attempt
    - * to cover the maximum potential vector length (such as happen with
    - * the regset used for ptrace) end up being extremely large. Define
    - * the much lower actual limit for use in such situations.
    + * the architecture. Using this length to allocate worst size buffers
    + * results in excessively large allocations, and this effect is even
    + * more pronounced for SME due to ZA. Define more suitable VLs for
    + * these situations.
    */
    -#define SME_VQ_MAX 16
    +#define ARCH_SVE_VQ_MAX ((ZCR_ELx_LEN_MASK >> ZCR_ELx_LEN_SHIFT) + 1)
    +#define SME_VQ_MAX ((SMCR_ELx_LEN_MASK >> SMCR_ELx_LEN_SHIFT) + 1)

    struct task_struct;

    diff --git a/arch/arm64/kernel/ptrace.c b/arch/arm64/kernel/ptrace.c
    index b3f64144b5cd9..c94c0f8c9a737 100644
    --- a/arch/arm64/kernel/ptrace.c
    +++ b/arch/arm64/kernel/ptrace.c
    @@ -1499,7 +1499,8 @@ static const struct user_regset aarch64_regsets[] = {
    #ifdef CONFIG_ARM64_SVE
    [REGSET_SVE] = { /* Scalable Vector Extension */
    .core_note_type = NT_ARM_SVE,
    - .n = DIV_ROUND_UP(SVE_PT_SIZE(SVE_VQ_MAX, SVE_PT_REGS_SVE),
    + .n = DIV_ROUND_UP(SVE_PT_SIZE(ARCH_SVE_VQ_MAX,
    + SVE_PT_REGS_SVE),
    SVE_VQ_BYTES),
    .size = SVE_VQ_BYTES,
    .align = SVE_VQ_BYTES,
    --
    2.43.0

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