Messages in this thread | ![/](/images/icornerl.gif) | | Date | Thu, 29 Feb 2024 11:11:27 +0000 | From | Mark Brown <> | Subject | Re: [PATCH V2] arm64/hw_breakpoint: Directly use ESR_ELx_WNR for an watchpoint exception |
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On Thu, Feb 29, 2024 at 02:04:31PM +0530, Anshuman Khandual wrote: > Let's use existing ISS encoding for an watchpoint exception i.e ESR_ELx_WNR > This represents an instruction's either writing to or reading from a memory > location during an watchpoint exception. While here this drops non-standard > macro AARCH64_ESR_ACCESS_MASK.
Reviewed-by: Mark Brown <broonie@kernel.org> [unhandled content-type:application/pgp-signature] | ![\](/images/icornerr.gif) |