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SubjectRe: [PATCH v15 2/9] usb: dwc3: core: Access XHCI address space temporarily to read port info
On Fri, Feb 16, 2024 at 06:27:49AM +0530, Krishna Kurapati wrote:
> Currently Multiport DWC3 controllers are host-only capable.

I already asked you to rephrase this so that it becomes clear that you
are describing a property of the current hardware (and similar
throughout the series):

https://lore.kernel.org/all/ZTI7AtCJWgAnACSh@hovoldconsulting.com/

> +static int dwc3_read_port_info(struct dwc3 *dwc)
> +{
> + void __iomem *base;
> + u8 major_revision;
> + u32 offset;
> + u32 val;
> +
> + /*
> + * Remap xHCI address space to access XHCI ext cap regs since it is
> + * needed to get information on number of ports present.
> + */
> + base = ioremap(dwc->xhci_resources[0].start,
> + resource_size(&dwc->xhci_resources[0]));
> + if (IS_ERR(base))
> + return PTR_ERR(base);
> +
> + offset = 0;
> + do {
> + offset = xhci_find_next_ext_cap(base, offset,
> + XHCI_EXT_CAPS_PROTOCOL);
> + if (!offset)
> + break;
> +
> + val = readl(base + offset);
> + major_revision = XHCI_EXT_PORT_MAJOR(val);
> +
> + val = readl(base + offset + 0x08);
> + if (major_revision == 0x03) {
> + dwc->num_usb3_ports += XHCI_EXT_PORT_COUNT(val);
> + } else if (major_revision <= 0x02) {
> + dwc->num_usb2_ports += XHCI_EXT_PORT_COUNT(val);
> + } else {
> + dev_warn(dwc->dev,
> + "unrecognized port major revision %d\n",

I still think you should merge this with the previous line even if you
end up with 83 chars.

> + major_revision);
> + }
> + } while (1);

> + /*
> + * Currently only DWC3 controllers that are host-only capable
> + * support Multiport.
> + */

So again, also here, rephrase the comment so that it is clear that you
are referring to a property of the current hardware.

> + hw_mode = DWC3_GHWPARAMS0_MODE(dwc->hwparams.hwparams0);
> + if (hw_mode == DWC3_GHWPARAMS0_MODE_HOST) {
> + ret = dwc3_read_port_info(dwc);
> + if (ret)
> + goto err_disable_clks;
> + } else {
> + dwc->num_usb2_ports = 1;
> + dwc->num_usb3_ports = 1;
> + }

Johan

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