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SubjectRe: [PATCH] arm64/sysreg: Add register fields for ID_AA64DFR1_EL1
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On 2/15/24 18:34, Mark Brown wrote:
> On Thu, Feb 15, 2024 at 12:24:54PM +0530, Anshuman Khandual wrote:
>
>> Sysreg ID_AA64DFR1_EL1 3 0 0 5 1
>> -Res0 63:0
>> +Field 63:56 ABL_CMPs
>> +Field 55:52 DPFZS
>
> This is documented in the architecture as an enumeration, though I'm not
> immediately seeing what values to use.

Just wondering - would something like the following make sense. Because
0b0000 signifies that the cycle counter would just ignore PMCR_EL0.FZS,
where as it gets frozen with 0b0001.

UnsignedEnum 55:52 DPFZS
0b0000 IGNR
0b0001 FRZN
EndEnum

>
> Otherwise this looks good.

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