Messages in this thread |  | | From | Dmitry Baryshkov <> | | Date | Tue, 23 Jan 2024 18:49:19 +0200 | | Subject | Re: [PATCH 2/3] clk: qcom: gcc-sm8150: Add gcc_parents_0_ao support |
| |
On Tue, 23 Jan 2024 at 18:35, Satya Priya Kakitapalli <quic_skakitap@quicinc.com> wrote: > > Add active_only support for gcc_parents_0, this is needed because > some of the clocks under it are critical which would vote on xo > blocking the suspend.
The kernel should be able to work with older DT files. Please add support for using bi_tcxo as a fallback.
> > Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com> > --- > drivers/clk/qcom/gcc-sm8150.c | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/drivers/clk/qcom/gcc-sm8150.c b/drivers/clk/qcom/gcc-sm8150.c > index 05d115c52dfe..2a0608c5a104 100644 > --- a/drivers/clk/qcom/gcc-sm8150.c > +++ b/drivers/clk/qcom/gcc-sm8150.c > @@ -123,6 +123,12 @@ static const struct clk_parent_data gcc_parents_0[] = { > { .hw = &gpll0_out_even.clkr.hw }, > }; > > +static const struct clk_parent_data gcc_parents_0_ao[] = { > + { .fw_name = "bi_tcxo_ao", .name = "bi_tcxo_ao" }, > + { .hw = &gpll0.clkr.hw }, > + { .hw = &gpll0_out_even.clkr.hw }, > +}; > + > static const struct parent_map gcc_parent_map_1[] = { > { P_BI_TCXO, 0 }, > { P_GPLL0_OUT_MAIN, 1 }, > @@ -222,8 +228,8 @@ static struct clk_rcg2 gcc_cpuss_ahb_clk_src = { > .freq_tbl = ftbl_gcc_cpuss_ahb_clk_src, > .clkr.hw.init = &(struct clk_init_data){ > .name = "gcc_cpuss_ahb_clk_src", > - .parent_data = gcc_parents_0, > - .num_parents = ARRAY_SIZE(gcc_parents_0), > + .parent_data = gcc_parents_0_ao, > + .num_parents = ARRAY_SIZE(gcc_parents_0_ao), > .flags = CLK_SET_RATE_PARENT, > .ops = &clk_rcg2_ops, > }, > > -- > 2.25.1 > >
-- With best wishes Dmitry
|  |