Messages in this thread Patch in this message | | | From | Mark Hasemeyer <> | Subject | [PATCH v4 06/24] ARM: dts: rockchip: rk3288: Enable cros-ec-spi as wake source | Date | Tue, 2 Jan 2024 14:07:30 -0700 |
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The cros_ec driver currently assumes that cros-ec-spi compatible device nodes are a wakeup-source even though the wakeup-source property is not defined.
Some Chromebooks use a separate wake pin, while others overload the interrupt for wake and IO. With the current assumption, spurious wakes can occur on systems that use a separate wake pin. It is planned to update the driver to no longer assume that the EC interrupt pin should be enabled for wake.
Add the wakeup-source property to all cros-ec-spi compatible device nodes to signify to the driver that they should still be a valid wakeup source.
Signed-off-by: Mark Hasemeyer <markhas@chromium.org> ---
(no changes since v3)
Changes in v3: -Update commit message to provide details of the motivation behind the change
Changes in v2: -Split by arch/soc
arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi | 1 + 1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi index 092316be67f74..1554fe36e60fe 100644 --- a/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi +++ b/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi @@ -112,6 +112,7 @@ cros_ec: ec@0 { pinctrl-names = "default"; pinctrl-0 = <&ec_int>; spi-max-frequency = <3000000>; + wakeup-source; i2c_tunnel: i2c-tunnel { compatible = "google,cros-ec-i2c-tunnel"; -- 2.43.0.472.g3155946c3a-goog
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