Messages in this thread |  | | Date | Wed, 17 Jan 2024 22:05:47 +0100 | | From | Andi Shyti <> | | Subject | Re: [PATCH] i2c: cadence: Avoid fifo clear after start |
| |
Hi,
> >> b/drivers/i2c/busses/i2c-cadence.c > >> index de3f58b60dce..6f7d753a8197 100644 > >> --- a/drivers/i2c/busses/i2c-cadence.c > >> +++ b/drivers/i2c/busses/i2c-cadence.c > >> @@ -633,6 +633,7 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id) > >> > >> if (hold_clear) { > >> ctrl_reg &= ~CDNS_I2C_CR_HOLD; > >> + ctrl_reg &= ~CDNS_I2C_CR_CLR_FIFO; > > > >I'm wondering whether the whole ctrl_reg should be reset after the first write.
> [Boddu, Sai Pavan] previous implementation of read-modify-write was good then ?
I don't know, I'm just asking... because rather than read-modify-write, this is read-modify-write-modify-write :-)
I'm just wondering if after the first write ctrl_reg is still holding a valid value.
Andi
|  |