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SubjectRe: [PATCH v2] dt-bindings: fpga: Convert fpga-region binding to yaml
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On 1/17/24 08:52, Krzysztof Kozlowski wrote:
> On 16/01/2024 15:04, Michal Simek wrote:
>> Convert the generic fpga region DT binding to json-schema.
>> There are some differences compare to txt version.
>> 1. DT overlay can't be described in example that's why directly include
>> information from overlay to node which was referenced. It is visible in
>> example with /* DT Overlay contains: &... */
>>
>> 2. All example have been rewritten to be simpler and describe only full
>> reconfiguration and partial reconfiguration with one bridge.
>> Completely drop the case where fpga region can inside partial
>> reconfiguration region which is already described in description
>>
>> 3. Fixed some typos in descriptions compare to txt version but most of it
>> is just c&p from txt file.
>>
>> Signed-off-by: Michal Simek <michal.simek@amd.com>
>> ---
>
> ...
>
>> + --
>> + [1] www.altera.com/content/dam/altera-www/global/en_US/pdfs/literature/ug/ug_partrecon.pdf
>> + [2] tspace.library.utoronto.ca/bitstream/1807/67932/1/Byma_Stuart_A_201411_MAS_thesis.pdf
>> + [3] https://www.xilinx.com/support/documentation/sw_manuals/xilinx14_1/ug702.pdf
>> +
>> +properties:
>> + $nodename:
>> + pattern: "^fpga-region(-[0-9]|[1-9][0-9]+)?$"
>
> I think you miss here one set of (). Please look at my previous pattern
> and test yours. This should fail, e.g. on fpga-region-0

you are right her but it fails on fpga-region-10.

Thanks,
Michal



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