Messages in this thread |  | | Subject | Re: [PATCH v2] irqchip/loongson-eiointc: Refine irq affinity setting during resume | | From | Sergey Shtylyov <> | | Date | Tue, 16 Jan 2024 11:17:24 +0300 |
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On 1/16/24 11:05 AM, Bibo Mao wrote:
> During suspend and resume, other CPUs are hot-unpluged and IRQs are > migrated to CPU0. So it is not necessary to restore irq affinity for > eiointc irq controller. > > Also there is some optimization for the interrupt dispatch function > eiointc_irq_dispatch. There are 256 IRQs supported for eiointc, eiointc > irq handler reads the bitmap and find pending irqs when irq happens. > So there are four times of consecutive iocsr_read64 operations for the > total 256 bits to find all pending irqs. If the pending bitmap is zero, > it means that there is no pending irq for the this irq bitmap range, > we can skip handling to avoid some useless operations sush as clearing
s/sush/such/?
> hw ISR.
This sounds like you need 2 patches to deal with 2 separate issues...
> Signed-off-by: Bibo Mao <maobibo@loongson.cn> [...]
MBR, Sergey
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