Messages in this thread | | | Date | Wed, 6 Sep 2023 11:33:58 +0200 | Subject | Re: [PATCH RESEND 7/7] arm64: dts: qcom: include the GPLL0 as clock provider for IPQ mailbox | From | Konrad Dybcio <> |
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On 6.09.2023 06:56, Kathiravan Thirumoorthy wrote: > While the kernel is booting up, APSS PLL will be running at 800MHz with > GPLL0 as source. Once the cpufreq driver is available, APSS PLL will be > configured to the rate based on the opp table and the source also will be > changed to APSS_PLL_EARLY. > > Also, dynamic scaling of CPUFreq is not supported on IPQ5332, so to switch > between the frequencies we need to park the APSS PLL in safe source, > here it is GPLL0 and then shutdown and bring up the APSS PLL in the > desired rate. So this patch is preparatory one to enable the CPUFreq on > IPQ5332. > > Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > --- Please split this. Somebody reverting this in the future will have a hard time resolving conflicts.
Konrad
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