Messages in this thread Patch in this message | | | From | Yu Chien Peter Lin <> | Subject | [RFC PATCH 2/4] irqchip/riscv-intc: Support large non-standard hwirq number | Date | Thu, 7 Sep 2023 10:16:33 +0800 |
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Currently, the implementation of the RISC-V INTC driver uses the interrupt cause as hwirq and has a limitation of supporting a maximum of 64 hwirqs. However, according to the privileged spec, interrupt cause >= 16 are defined for platform use.
This limitation prevents us from fully utilizing the available local interrupt sources. Additionally, the hwirqs used on RISC-V are sparse, with only interrupt numbers 1, 5 and 9 (plus Sscofpmf or T-Head's PMU irq) being currently used for supervisor mode.
The patch switches to using irq_domain_create_tree() which creates the radix tree map, allowing us to handle a larger number of hwirqs.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Charles Ci-Jyun Wu <dminus@andestech.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
--- There are 3 hwirqs of local interrupt source exceed 64 defined in AX45MP datasheet [1] Table 56: AX45MP-1C scause Value After Trap: - 256+16 Slave port ECC error interrupt (S-mode) - 256+17 Bus write transaction error interrupt (S-mode) - 256+18 Performance monitor overflow interrupt(S-mode)
[1] http://www.andestech.com/wp-content/uploads/AX45MP-1C-Rev.-5.0.0-Datasheet.pdf --- drivers/irqchip/irq-riscv-intc.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c index 4adeee1bc391..76e1229c45de 100644 --- a/drivers/irqchip/irq-riscv-intc.c +++ b/drivers/irqchip/irq-riscv-intc.c @@ -24,8 +24,8 @@ static asmlinkage void riscv_intc_irq(struct pt_regs *regs) { unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; - if (unlikely(cause >= BITS_PER_LONG)) - panic("unexpected interrupt cause"); + if (!irq_find_mapping(intc_domain, cause)) + panic("unexpected interrupt cause: %ld", cause); generic_handle_domain_irq(intc_domain, cause); } @@ -117,8 +117,8 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn) { int rc; - intc_domain = irq_domain_create_linear(fn, BITS_PER_LONG, - &riscv_intc_domain_ops, NULL); + intc_domain = irq_domain_create_tree(fn, &riscv_intc_domain_ops, + NULL); if (!intc_domain) { pr_err("unable to add IRQ domain\n"); return -ENXIO; @@ -132,8 +132,6 @@ static int __init riscv_intc_init_common(struct fwnode_handle *fn) riscv_set_intc_hwnode_fn(riscv_intc_hwnode); - pr_info("%d local interrupts mapped\n", BITS_PER_LONG); - return 0; } -- 2.34.1
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