Messages in this thread | | | From | Michael Shavit <> | Date | Fri, 28 Jul 2023 18:31:10 +0800 | Subject | Re: [PATCH v1 6/7] iommu/arm-smmu-v3: Refactor write_ctx_desc |
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On Fri, Jul 28, 2023 at 3:34 PM Michael Shavit <mshavit@google.com> wrote: > > On Fri, Jul 28, 2023 at 5:38 AM Nicolin Chen <nicolinc@nvidia.com> wrote: > > > @@ -1101,11 +1094,11 @@ int arm_smmu_write_ctx_desc(struct arm_smmu_domain *smmu_domain, int ssid, > > > cdptr[3] = cpu_to_le64(cd->mair); > > > > > > /* > > > - * STE is live, and the SMMU might read dwords of this CD in any > > > - * order. Ensure that it observes valid values before reading > > > - * V=1. > > > + * STE may be live, and the SMMU might read dwords of this CD > > > + * in any order. Ensure that it observes valid values before > > > + * reading V=1. > > > > This seems to be true only after the following patch? If so, we > > should move this part over there too. > > This comment is more in theme with the next commit so I can move it > over. But FWIW, the fact that the STE is not necessarily live at this > location is true before this patch, in this patch, and after the > following patch. Fixing this comment is just a drive-by, not a result > of any of these changes.
Whoops, I mean more in theme with the previous commit.
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