Messages in this thread | ![/](/images/icornerl.gif) | | Date | Mon, 24 Jul 2023 18:15:21 +0530 | Subject | Re: [PATCH v5 6/6] soc: qcom: llcc: Add QDU1000 and QRU1000 LLCC support | From | Mukesh Ojha <> |
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On 7/24/2023 2:11 PM, Komal Bajaj wrote: > Add LLCC configuration data for QDU1000 and QRU1000 SoCs. > > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com> > --- > drivers/soc/qcom/llcc-qcom.c | 67 ++++++++++++++++++++++++++++++++++++ > 1 file changed, 67 insertions(+) > > diff --git a/drivers/soc/qcom/llcc-qcom.c b/drivers/soc/qcom/llcc-qcom.c > index 228ffb4a8971..95766260b3b8 100644 > --- a/drivers/soc/qcom/llcc-qcom.c > +++ b/drivers/soc/qcom/llcc-qcom.c > @@ -364,6 +364,36 @@ static const struct llcc_slice_config sm8550_data[] = { > {LLCC_VIDVSP, 28, 256, 4, 1, 0xFFFFFF, 0x0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, > }; > > +static const struct llcc_slice_config qdu1000_data_2ch[] = { > + { LLCC_MDMHPGRW, 7, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MODHW, 9, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MDMPNG, 21, 256, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_ECC, 26, 512, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > + { LLCC_MODPE, 29, 256, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_APTCM, 30, 256, 3, 1, 0x0, 0xC, 1, 0, 0, 1, 0, 0, 0 }, > + { LLCC_WRCACHE, 31, 128, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > +}; > + > +static const struct llcc_slice_config qdu1000_data_4ch[] = { > + { LLCC_MDMHPGRW, 7, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MODHW, 9, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MDMPNG, 21, 512, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_ECC, 26, 1024, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > + { LLCC_MODPE, 29, 512, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_APTCM, 30, 512, 3, 1, 0x0, 0xC, 1, 0, 0, 1, 0, 0, 0 }, > + { LLCC_WRCACHE, 31, 256, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > +}; > + > +static const struct llcc_slice_config qdu1000_data_8ch[] = { > + { LLCC_MDMHPGRW, 7, 2048, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MODHW, 9, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_MDMPNG, 21, 1024, 0, 1, 0x3, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_ECC, 26, 2048, 3, 1, 0xffc, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > + { LLCC_MODPE, 29, 1024, 1, 1, 0xfff, 0x0, 0, 0, 0, 1, 0, 0, 0 }, > + { LLCC_APTCM, 30, 1024, 3, 1, 0x0, 0xC, 1, 0, 0, 1, 0, 0, 0 }, > + { LLCC_WRCACHE, 31, 512, 1, 1, 0x3, 0x0, 0, 0, 0, 0, 1, 0, 0 }, > +}; > + > static const struct llcc_edac_reg_offset llcc_v1_edac_reg_offset = { > .trp_ecc_error_status0 = 0x20344, > .trp_ecc_error_status1 = 0x20348, > @@ -551,6 +581,37 @@ static const struct qcom_llcc_config sm8550_cfg[] = { > }, > }; > > +static const struct qcom_llcc_config qdu1000_cfg[] = { > + { > + .sct_data = qdu1000_data_8ch, > + .size = ARRAY_SIZE(qdu1000_data_8ch), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v2_1_reg_offset, > + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, > + }, > + { > + .sct_data = qdu1000_data_4ch, > + .size = ARRAY_SIZE(qdu1000_data_4ch), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v2_1_reg_offset, > + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, > + }, > + { > + .sct_data = qdu1000_data_4ch, > + .size = ARRAY_SIZE(qdu1000_data_4ch), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v2_1_reg_offset, > + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, > + }, > + { > + .sct_data = qdu1000_data_2ch, > + .size = ARRAY_SIZE(qdu1000_data_2ch), > + .need_llcc_cfg = true, > + .reg_offset = llcc_v2_1_reg_offset, > + .edac_reg_offset = &llcc_v2_1_edac_reg_offset, > + }, > +}; > + > static const struct qcom_sct_config sc7180_cfgs = { > .llcc_config = sc7180_cfg, > .num_cfgs = 1, > @@ -611,6 +672,11 @@ static const struct qcom_sct_config sm8550_cfgs = { > .num_cfgs = 1, > }; > > +static const struct qcom_sct_config qdu1000_cfgs = { > + .llcc_config = qdu1000_cfg, > + .num_cfgs = 1,
Should not this be 4 ?
-Mukesh
> +}; > + > static struct llcc_drv_data *drv_data = (void *) -EPROBE_DEFER; > > /** > @@ -1167,6 +1233,7 @@ static int qcom_llcc_probe(struct platform_device *pdev) > } > > static const struct of_device_id qcom_llcc_of_match[] = { > + { .compatible = "qcom,qdu1000-llcc", .data = &qdu1000_cfgs}, > { .compatible = "qcom,sc7180-llcc", .data = &sc7180_cfgs }, > { .compatible = "qcom,sc7280-llcc", .data = &sc7280_cfgs }, > { .compatible = "qcom,sc8180x-llcc", .data = &sc8180x_cfgs },
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